Experimental investigation of bare silicon wafer warp

Warping of silicon wafers subjected to back-grinding process

“…Compressive stress is usually formed in the surface damage layer of a wafer after the thinning process [5][6][7]9,10]. In the FEA process, thermal stress is assumed to simulate both grinding-induced stress (also called machining stress in this paper) and residual stress since these stresses are technically difficult to handle in the FEA loading process.…”

“…Also using the Stoney formula and the assumption of a uniform damage layer, Chen et al estimated residual stress through warp measurement [6]. Similarly, Draney et al found a relationship between wafer warp and wafer thickness [7]. In the wafer thinning research so far, it has been common to (a) assume a uniform damage layer; and (b) use the Stoney formula to correlate wafer warp with residual stress, damage layer thickness, wafer thickness and diameter, etc.…”

Thin silicon wafer processing and strength characterization

“…Grind damage alone can cause wafer bow, even in the absence of deposited films [7,48,51,52]. Defects from the grinding process create a compressively stressed damage layer.…”

“…Although the damaged layer is thin, it can cause significant bow in thin wafers. Hence, a stress relief process, such as a polish, a wet etch, or a dry etch, is necessary to minimize wafer bow [51].…”

Analysis Of Factors Affecting Gravity-Induced Deflection For Large And Thin Wafers In Flatness Measurement Using Three-Point-Support Method

“…Wafers with low deformation are required since significant deformation caused in the thinning process results in handling and processing issues [5,6]. The flatness measurement plays an important role in production engineering to determine if the flatness of the wafer satisfies given requirements as wafers with large deformation tend to break.…”