Excellent heat resistance polymeric gate insulator for thin-film transistor by low temperature and solution processing

Kim, Ji Young; Yi, Mi Hye; Ahn, Taek

doi:10.1016/j.tsf.2010.02.047

Cited by 11 publications

(4 citation statements)

References 18 publications

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“…Hydroxyl-free hydrophilic SiN, , and hydrophobic polyimide , and parylene , were employed because these surfaces are not hydrated by water molecules that are hydrogen-bonded to silanols as in SiO 2 . , All samples were heated at 180 °C for 2 min to completely remove any residual water after electric field alignment of the NWs, and the FETs were washed with ethanol and chloroform to take away ligands on the surface of the NWs. Measurements were done at least 24 h after heating to allow devices to return to predominantly p-type character.…”

Section: Resultsmentioning

confidence: 99%

Flexible, Low-Voltage, and Low-Hysteresis PbSe Nanowire Field-Effect Transistors

et al. 2011

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We report low-hysteresis, ambipolar bottom gold contact, colloidal PbSe nanowire (NW) field-effect transistors (FETs) by chemically modifying the silicon dioxide (SiO(2)) gate dielectric surface to overcome carrier trapping at the NW-gate dielectric interface. While water bound to silanol groups at the SiO(2) surface are believed to give rise to hysteresis in FETs of a wide range of nanoscale materials, we show that dehydration and silanization are insufficient in reducing PbSe NW FET hysteresis. Encapsulating PbSe NW FETs in cured poly(methyl) methacrylate (PMMA), dehydrates and uniquely passivates the SiO(2) surface, to form low-hysteresis FETs. Annealing predominantly p-type ambipolar PbSe NW FETs switches the FET behavior to predominantly n-type ambipolar, both with and without PMMA passivation. Heating the PbSe NW devices desorbs surface bound oxygen, even present in the atmosphere of an inert glovebox. Upon cooling, overtime oxygen readsorption switches the FET polarity to predominantly p-type ambipolar behavior, but PMMA encapsulation maintains low hysteresis. Unfortunately PMMA is sensitive to most solvents and heat treatments and therefore its application for nanostructured material deposition and doping is limited. Seeking a robust, general platform for low-hysteresis FETs we explored a variety of hydroxyl-free substrate surfaces, including silicon nitride, polyimide, and parylene, which show reduced electron trapping, but still large hysteresis. We identified a robust dielectric stack by assembling octadecylphosphonic acid (ODPA) on aluminum oxide (Al(2)O(3)) to form low-hysteresis FETs. We further integrated the ODPA/Al(2)O(3) gate dielectric stack on flexible substrates to demonstrate low-hysteresis, low-voltage FETs, and the promise of these nanostructured materials in flexible, electronic circuitry.

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Section: Resultsmentioning

confidence: 99%

Flexible, Low-Voltage, and Low-Hysteresis PbSe Nanowire Field-Effect Transistors

et al. 2011

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“…However, OTFTs made of polymer gate dielectrics are suffering from high operating voltage, typically exceeding 20 V, due to the gate dielectrics with the thickness often greater than 100 nm to ensure low gate leakage current . Thermally crosslinked polymers including poly(4‐vinylphenol) (PVP), Cytop, benzocyclobutene (BCB), and polyimides (PIs) have been adopted for gate dielectrics, but only few of them could successfully reduce the operating voltage of OTFTs down to 10 V by reducing the thickness of dielectric layer. Moreover, the high annealing temperature required to induce the crosslinking of polymer gate dielectrics is also problematic, which may cause damage to OTFTs and limit their application to thermally vulnerable substrates.…”

Section: Introductionmentioning

confidence: 99%

A Surface Tailoring Method of Ultrathin Polymer Gate Dielectrics for Organic Transistors: Improved Device Performance and the Thermal Stability Thereof

Seong

Baek

Pak

et al. 2015

Adv Funct Materials

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wileyonlinelibrary.comand portable devices, the device performance must be substantially improved. To this end, high-performance organic gate dielectric layers with high mechanical stability and large-area processability are urgently requested. [ 1 ] However, OTFTs made of polymer gate dielectrics are suffering from high operating voltage, typically exceeding 20 V, [ 3,4 ] due to the gate dielectrics with the thickness often greater than 100 nm to ensure low gate leakage current. [ 4 ] Thermally crosslinked polymers including poly(4vinylphenol) (PVP), [ 5 ] Cytop, [ 6 ] benzocyclobutene (BCB), [ 7 ] and polyimides (PIs) [ 8 ] have been adopted for gate dielectrics, but only few of them could successfully reduce the operating voltage of OTFTs down to 10 V by reducing the thickness of dielectric layer. Moreover, the high annealing temperature required to induce the crosslinking of polymer gate dielectrics is also problematic, which may cause damage to OTFTs and limit their application to thermally vulnerable substrates.Besides reducing the operating voltage of OTFTs, controlling the interface between dielectric and semiconductor is another critical factor to optimize the performance of OTFTs. [ 9,10 ] Applying selfassembled monolayers (SAMs) [ 10 ] or plasma treatment [ 11 ] had been widely applied to optimize the fi lm morphology of semiconductors on the surface of gate dielectrics. However, most of these SAM treatment procedures require specifi c surface coupling reaction, and had been applied mostly onto inorganic dielectric layers rather than polymer dielectrics, mostly due to the lack of target surface functionalities on most of the polymer dielectrics and/or a reliable, damage-free coupling reaction applicable onto the polymer dielectrics.Recently, we have proposed initiated chemical vapor deposition (iCVD) as a new deposition method to form ultrathin (<10 nm) crosslinked polymer dielectrics with high density. [ 12 ] iCVD is a well-established dry process, which can deposit highly pure polymer thin fi lms in mild process temperature (10-40 °C) and pressure (in the order of 100 mTorr). [ 13 ] Especially, an organosilicon polymer, poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3), exhibited an extremely low leakage current (less than 10 −9 A cm −2 at 3 MV cm −1 ) even with ultralow thickness (≈6 nm), and chemical/mechanical robustness. Nevertheless, Tailoring the surface of the dielectric layer is of critical importance to form a good interface with the following channel layer for organic thin fi lm transistors (OTFTs). Here, a simple surface treatment method is applied onto an ultrathin (<15 nm) organosilicon-based dielectric layer via the initiated chemical vapor deposition (iCVD) to make it compatible with organic semiconductors without degrading its insulating property. A molecular-thin oxide capping layer is formed on a 15 nm thick poly(1,3,5-trimetyl-1,3,5-trivinyl cyclotrisiloxane) (pV3D3) by a brief oxygen plasma treatment. The capping layer greatly enhances the thermal stability of the diel...

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“…Polyimides are well-known to have excellent thermal stability and electrical insulating property that are strongly related to the chain packing. [23][24][25] Use of the BODA with a longer rigid core as a diamine monomer might be advantageous to the polymer chain packing, and it might affect the thermal stability and gate insulating property of the polymer lm.…”

Section: Resultsmentioning

confidence: 99%

“…The active area of the MIM devices was 50. 24 3 $xH 2 O) were dissolved in anhydrous 2-methoxyethanol. Aer spin-coating of the IZO precursor solution on the K-PIB gate insulator at 4000 rpm for 30 s, the lm was annealed at 90 C for 10 min and 300 C for 2 h on a hot-plate in ambient air.…”

Section: Methodsmentioning

confidence: 99%

Poly(imide-benzoxazole) gate insulators with high thermal resistance for solution-processed flexible indium-zinc oxide thin-film transistors

et al. 2014

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Excellent heat resistance polymeric gate insulator for thin-film transistor by low temperature and solution processing

Cited by 11 publications

References 18 publications

Flexible, Low-Voltage, and Low-Hysteresis PbSe Nanowire Field-Effect Transistors

Flexible, Low-Voltage, and Low-Hysteresis PbSe Nanowire Field-Effect Transistors

A Surface Tailoring Method of Ultrathin Polymer Gate Dielectrics for Organic Transistors: Improved Device Performance and the Thermal Stability Thereof

Poly(imide-benzoxazole) gate insulators with high thermal resistance for solution-processed flexible indium-zinc oxide thin-film transistors

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