2015
DOI: 10.1002/adfm.201500952
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A Surface Tailoring Method of Ultrathin Polymer Gate Dielectrics for Organic Transistors: Improved Device Performance and the Thermal Stability Thereof

Abstract: wileyonlinelibrary.comand portable devices, the device performance must be substantially improved. To this end, high-performance organic gate dielectric layers with high mechanical stability and large-area processability are urgently requested. [ 1 ] However, OTFTs made of polymer gate dielectrics are suffering from high operating voltage, typically exceeding 20 V, [ 3,4 ] due to the gate dielectrics with the thickness often greater than 100 nm to ensure low gate leakage current. [ 4 ] Thermally crosslinked po… Show more

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Cited by 60 publications
(55 citation statements)
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“…The thermal treatment condition of PTCDI-C13 on pV3D3 was optimized by varying the annealing temperature ( Figure 2 a). Thanks to the excellent thermal stability of pV3D3, [ 18 ] the annealing temperature of PTCDI-C13 on pV3D3 could be increased as high as 300 °C without damaging the insulating performance of the ultrathin pV3D3 layer. The highest mobility was obtained from the PTCDI-C13 TFT with the annealing temperature ranging from 150 to 200 °C.…”
Section: Doi: 101002/aelm201500385mentioning
confidence: 99%
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“…The thermal treatment condition of PTCDI-C13 on pV3D3 was optimized by varying the annealing temperature ( Figure 2 a). Thanks to the excellent thermal stability of pV3D3, [ 18 ] the annealing temperature of PTCDI-C13 on pV3D3 could be increased as high as 300 °C without damaging the insulating performance of the ultrathin pV3D3 layer. The highest mobility was obtained from the PTCDI-C13 TFT with the annealing temperature ranging from 150 to 200 °C.…”
Section: Doi: 101002/aelm201500385mentioning
confidence: 99%
“…Also, note that the TFT characteristics and I G were remained similar for a wide range of pV3D3 thicknesses between ≈8.5 nm and ≈45 nm ( Figure S1 and Table S1 in the Supporting Information for DNTT TFTs and Figure S2 and Table S2 in the Supporting Information for PTCDI-C13 TFTs), thanks to the excellent down-scalability of iCVD process. [ 17,18 ] To develop high-performance OTFTs, it is important to form highly crystalline organic semiconductors to facilitate the charge transport between the source/drain (S/D) electrodes. From the atomic force microscopy (AFM) images and X-ray diffractometer (XRD) spectra, we observed that the asdeposited p-type DNTT semiconductor on the pV3D3 dielectric layer was highly crystalline with large grains ( Figure S3, Supporting Information).…”
Section: Doi: 101002/aelm201500385mentioning
confidence: 99%
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“…[1][2][3][4][5][6][7][8][9] Generally, the thickness of organic semiconductor layer in organic electronic devices is in the range of several tens of to hundreds of nanometer (nm), which consists of tens of or more molecular layers. [10][11][12][13][14][15][16] On the other hand, ultrathin film (< 15 nm, Figure 1a) of organic semiconductors represents a kind of nano-scale film consisting of monolayer to few molecular layers (Figure 1b). [17][18][19][20][21][22][23] 3 According to the surface morphology, ultrathin film includes continuous and microstructured film (Figure 1a), both of which provide excellent platform for fundamental researches and practical applications.…”
Section: Introductionmentioning
confidence: 99%
“…For example, polarity‐switching top coats may not be suitable for amphiphilic BCPs with a hydrophilic block, as is the one used in this study, due to the potential diffusion of the solvent and top coat into the hydrophilic block in BCP. Furthermore, achieving thermally stable defect‐free and uniformly thick layers is not a simple task to achieve with spin‐coating, especially for sub‐10 nm thick films …”
mentioning
confidence: 99%