Evolution of temporary wafer (de)bonding technology towards low temperature processes for enhanced 3D integration

Phommahaxay, Alain; Jourdain, Anne; Bex, Pieter; Eede, Axel Van den; Swinnen, Bart; Beyer, Gerald; Miller, Andy; Beyne, Eric

doi:10.1109/ltb-3d.2012.6238094

Cited by 6 publications

(2 citation statements)

References 2 publications

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“…Given a process carrier TTV of 1µm, tight adhesive TTV control is required after coating and bonding. A challenging adhesive thickness variation below 1 µm is therefore needed over an entire 300mm wafer independently of the presence or not of topography on the wafer frontside [2].…”

Section: Wafer Thinning Process Requirementsmentioning

confidence: 99%

Demonstration of a novel low cost single material temporary bond solution for high topography substrates based on a mechanical wafer debonding and innovative adhesive removal

Phommahaxay

Nakamura²,

Jourdain

et al. 2015

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

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Among the technological developments pushed by the emergence of 3D-ICs, wafer thinning has become a key element in device processing over the past years. As technology matures, more emphasis is now being put on the overall cost of ownership, which is still regarded as a refraining element for technology adoption. Therefore novel temporary bond concepts and materials are being explored to further bring down the process complexity and cost.

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Section: Wafer Thinning Process Requirementsmentioning

confidence: 99%

Demonstration of a novel low cost single material temporary bond solution for high topography substrates based on a mechanical wafer debonding and innovative adhesive removal

Phommahaxay

Nakamura²,

Jourdain

et al. 2015

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

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“…Although the de-bonding temperature for thermal slide-off de-bonding method is less than the melting point of the solder(232 ℃ for Sn), IMC grows quickly during this step. Hence scaled down bump integration becomes more and more challenging with temperature based de-bonding processes [8]. For laser release materials such as 3M and Du-Pont, a glass carrier is needed.…”

Section: Introductionmentioning

confidence: 99%

Thin wafer handling process evaluation for 3DIC integration

Chang

Tsai

Chien

et al. 2012

2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)

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After temporary bonding and thinning process, many backside processes will be conducted on the thinned wafer. The critical processes for thin wafer handling material are high temperature and high vacuum processes. In this article, a quick adhesive selecting method is proposed. Backside process of PECVD SiO 2 is identified as the most critical process for thin wafer handling material selection. Two thermal plastic thin wafer handling materials are used in this study for 300 mm wafers and thermal compress bonding in a vacuum chamber is used for bonding process. After bonding, the wafer is thinned down to 50 μm by a commercialized grinder and the PECVD SiO 2 process is conducted on the thinned wafer. Many dishes were found after PECVD SiO 2 process because there is outgassing from the thin wafer handling material or from the device/carrier wafer surface. In this research, an additional hold time is proposed to reduce the dishing after PECVD SiO 2 process. Different hold time at 210 ℃ and different bonding time are evaluated. For the bonding process without hold time, large voids are observed. There are also 29 dishes on the surface of the wafer. By adding additional 5 minutes hold time before bonding, the number of the dishing on the wafer surface reduced from 29 to 6. If the hold time is set to 10 minutes, only 4 dishes were found on the wafer surface. From the evaluation result of these two thermal plastic thin wafer handling materials, B-glue seems much better than A-glue. The hold time seems very critical on void reduction during bonding process. From B-glue on PECVD SiO 2 experiment, 10 minutes hold time has the better performance for void reduction. The bonding process with zero hold time has the worst performance which has many voids after PECVD SiO 2 process. An ultra-thin 300 mm wafer with a thickness less than 7 μm is also demonstrated in this research by using B-glue and 10 minutes hold time.

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