In division and square root implementations based on digitrecurrence algorithms the result is obtained in digit-serial form, from most significant digit to least significant. Moreover, to reduce the complexity of the result-digit selection and to allow the use of redundant addition, the resultdigit has values from a signed-digit set. As a consequence, the result has to be converted to conventional representation. This conversion can be done on-the-fly as the digits are produced, without the use of a carry-propagate adder. In this paper we describe how to modify this conversion process so that the result is rounded. The resulting operation is faster than what is done conventionally because no carry-propagate addition is needed. We describe three rounding methods; they differ in the rounding e m r and the hardware and time required.