1988., IEEE International Symposium on Circuits and Systems
DOI: 10.1109/iscas.1988.14912
|View full text |Cite
|
Sign up to set email alerts
|

Evaluating 'A+B=K' conditions in constant time

Abstract: THEORETICAL BASISOne of the most important components of an ALU is the adder. Its response time is mainly determined by the carry propagation delay. Evaluation of conditions between two numbers are usually performed with the ALU by means of a substraction. In this paper we deal with a type of conditions that can be evalauted without requiring a complete ALU operation. The circuit that is presented detects the condition A+B=K (n-bit numbers) in constant time, avoiding the carry propagation delay. Some applicati… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 7 publications
(1 citation statement)
references
References 6 publications
0
1
0
Order By: Relevance
“…This detection can follow a conversion of the 6nal remainder to imdundant, if such a conversion is used for sign detection, or another special circuit can be used [CORT88] …”
Section: Rounding To Nearestmentioning
confidence: 99%
“…This detection can follow a conversion of the 6nal remainder to imdundant, if such a conversion is used for sign detection, or another special circuit can be used [CORT88] …”
Section: Rounding To Nearestmentioning
confidence: 99%