Estimation of near-interface oxide trap density at SiO2/SiC metal-oxide-semiconductor interfaces by transient capacitance measurements at various temperatures

Fujino, Yuki; Kita, Koji

doi:10.1063/1.4961871

Cited by 35 publications

(26 citation statements)

References 33 publications

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“…6) Therefore, investigation of NITs is very important. The NITs on SiC have been evaluated; [7][8][9][10][11] however, the spatial distribution of NITs is not considered in conventional analysis methods, and the nature of NITs remains under debate.…”

mentioning

confidence: 99%

Characterization of near-interface traps at 4H-SiC metal–oxide–semiconductor interfaces using modified distributed circuit model

Zhang

Okamoto

Hatakeyama

et al. 2017

Appl. Phys. Express

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We characterized the near-interface traps (NITs) in SiO2/4H-SiC structures according to the distributed circuit model, which was originally proposed for Al2O3/InGaAs interface structures. We assumed that the NITs had an exponentially decaying distribution from the SiO2/4H-SiC interface into the oxide, rather than the uniform trap distribution of the conventional model. Using this model with the exponential NIT distribution as a basis, we successfully explained the frequency-dependent characteristics of both the capacitance and conductance in the strong-accumulation condition with reasonable physical parameters. We also observed that nitridation annealing over a long period of time significantly reduced the NIT density distribution.

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confidence: 99%

Characterization of near-interface traps at 4H-SiC metal–oxide–semiconductor interfaces using modified distributed circuit model

Zhang

Okamoto

Hatakeyama

et al. 2017

Appl. Phys. Express

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“…The magnitude of the hysteresis is then estimated by calculating, at each of these 1024 points, the value of the area shaded in light blue in Figure 3a. Since the voltage is swept at a constant rate, this area is proportional to an injected charge [ 15 ] which may be associated with the presence of charge traps at the surface. The measurement is similar to local capacitance measurements which can quantitatively reveal the density of interface states.…”

Section: Resultsmentioning

confidence: 99%

Nanoscale Mapping of Sub‐Gap Electroluminescence from Step‐Bunched, Oxidized 4H‐SiC Surfaces

Alyabyeva

Ding

Sauty

et al. 2022

Physica Status Solidi (b)

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Scanning tunneling luminescence microscopy (STLM) and scanning tunneling spectroscopy (STS) are used to study step‐bunched, oxidized 4H‐SiC surfaces prepared using a silicon melt process. The step‐bunched surface consists of atomically smooth terraces parallel to [0001] crystal planes, and rougher risers containing nanoscale steps formed by the termination of these planes. The striking topography of this surface is well resolved with large tip biases around −8 V and set currents less than 1 nA. Hysteresis in the STS spectra is preferentially observed on risers, suggesting that they contain a higher density of surface charge traps than the terraces where hysteresis is more frequently absent. Similarly, intense sub‐gap light emission centered around 2.4 eV is observed mainly on the risers albeit only with larger tunneling currents equal to or greater than 10 nA. The surface‐oxide‐related origin of this emission is reinforced by comparing tunneling electroluminescence spectra on the 4H‐ and 6H‐polytypes, and by the observation of a drastic reduction in emitted intensity after removal of the oxide in buffered HF. These results demonstrate the capability of STLM for the observation of surface impurities and defects responsible for sub‐gap light emission with spatial resolutions approaching the length scale of the defects themselves.

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“…( 2) as an exponential function of measurement temperature, when we assume that the tunneling process in oxide from the interface to the trap is the rate-determining step of the carrier trapping process. 29,30) T…”

Section: Results Of Photo-assisted C-v With Various Wavelengths Of Lightmentioning

confidence: 99%

Characterization of deep traps in the near-interface oxide of widegap metal–oxide–semiconductor interfaces revealed by light irradiation and temperature change

Hasegawa¹,

Kita²

2022

Jpn. J. Appl. Phys.

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To evaluate oxide trap state density in the near interface region of silicon carbide metal-oxide-semiconductor (SiC MOS) stacks, photo-assisted capacitance-voltage measurements at various temperatures were performed. The difference between the deep trap profiles at SiC MOS interfaces treated with two kinds of post-oxidation-annealing was revealed, which cannot be detected by conventional evaluation methods of interface state density. With this method, the differences in energy profile of trap levels together with their spatial distribution in near interface region of oxide were investigated.

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Estimation of near-interface oxide trap density at SiO2/SiC metal-oxide-semiconductor interfaces by transient capacitance measurements at various temperatures

Cited by 35 publications

References 33 publications

Characterization of near-interface traps at 4H-SiC metal–oxide–semiconductor interfaces using modified distributed circuit model

Characterization of near-interface traps at 4H-SiC metal–oxide–semiconductor interfaces using modified distributed circuit model

Nanoscale Mapping of Sub‐Gap Electroluminescence from Step‐Bunched, Oxidized 4H‐SiC Surfaces

Characterization of deep traps in the near-interface oxide of widegap metal–oxide–semiconductor interfaces revealed by light irradiation and temperature change

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