2017
DOI: 10.7567/apex.10.064101
|View full text |Cite
|
Sign up to set email alerts
|

Characterization of near-interface traps at 4H-SiC metal–oxide–semiconductor interfaces using modified distributed circuit model

Abstract: We characterized the near-interface traps (NITs) in SiO2/4H-SiC structures according to the distributed circuit model, which was originally proposed for Al2O3/InGaAs interface structures. We assumed that the NITs had an exponentially decaying distribution from the SiO2/4H-SiC interface into the oxide, rather than the uniform trap distribution of the conventional model. Using this model with the exponential NIT distribution as a basis, we successfully explained the frequency-dependent characteristics of both th… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

1
21
0

Year Published

2018
2018
2023
2023

Publication Types

Select...
8

Relationship

1
7

Authors

Journals

citations
Cited by 26 publications
(25 citation statements)
references
References 33 publications
1
21
0
Order By: Relevance
“…In this context, some authors reported on an anisotropy of the channel mobility µ FE in 4H-SiC MOSFETs, with the channel in different orientations [30,45]. In particular, 4H-SiC MOSFETs fabricated with the channel along the [1-100] direction (along the bunched steps) exhibited a higher channel mobility compared to those fabricated with channel along the [11][12][13][14][15][16][17][18][19][20] direction (across the bunched steps) [45]. Frazzetto et al [29] explained this effect, taking into consideration the impact of both D it and surface roughness in the scattering contributions to the field effect mobility.…”
Section: Electrical Characterizationmentioning
confidence: 99%
See 2 more Smart Citations
“…In this context, some authors reported on an anisotropy of the channel mobility µ FE in 4H-SiC MOSFETs, with the channel in different orientations [30,45]. In particular, 4H-SiC MOSFETs fabricated with the channel along the [1-100] direction (along the bunched steps) exhibited a higher channel mobility compared to those fabricated with channel along the [11][12][13][14][15][16][17][18][19][20] direction (across the bunched steps) [45]. Frazzetto et al [29] explained this effect, taking into consideration the impact of both D it and surface roughness in the scattering contributions to the field effect mobility.…”
Section: Electrical Characterizationmentioning
confidence: 99%
“…In order to freeze the charged NIOTs, it is preferable to avoid the interruption of the gate bias and to reduce as much as possible the time needed to perform the Vth shift measurement. In the last decade, several time-resolved capacitance-and current-measurements have been employed to investigate the NIOTs [13,14,75]. A faster time resolution provides more information on NIOTs close Figure 11 shows a comparison of different techniques to determine the shift ∆V th in MOSFETs (current measurements) and the flat band voltage shift ∆V FB in MOS capacitors (capacitance measurements).…”
Section: Charge Trapping Phenomenamentioning
confidence: 99%
See 1 more Smart Citation
“…Considering the time constant property of interface states at deep energy levels, measurements at higher temperatures are indispensable to detect them because their thermal emission would become faster and even deeper interface states can be detected within the same given frequency range. Figure 7b and c illustrate the frequency-dependent C-V characteristics at 350 and 400 K. The frequency dispersion of C-V curves in the depletion region increases as the measurement temperature increases, indicating that interface states at deep energy levels can be detected at 400 K. Note that the frequency dispersion of the accumulation capacitance was also observed, which would be attributed to the border traps, often observed in InGaAs and SiC MOS structures [71][72][73][74]. The effect of series resistance on the accumulation capacitance was examined by a standard correction method [75], but the dispersion was unchanged after the correction.…”
Section: Interface Of Al 2 O 3 /P-type Oh-diamond Formed By Wet Annealing On H-diamondmentioning
confidence: 92%
“…Based on the electrical analysis of MOS capacitors using capacitance or conductance methods as well as photoemission (PE) or electron energy loss spectroscopy (EELS), these interface traps are assumed to reside in a substoichiometric, defect-rich transition region on the oxide side of the interface. There is, however, a large spread of experimental data on the extension of this sub-stoichiometric region and reports range from several Å to tens of nm [3][4][5][6].…”
Section: Introductionmentioning
confidence: 99%