Enhanced sheet carrier densities in polarization controlled AlInN/AlN/GaN/InGaN field-effect transistor on Si (111)

Abstract

We report on GaN based field-effect transistor (FET) structures exhibiting sheet carrier densities of n = 2.9 1013 cm−2 for high-power transistor applications. By grading the indium-content of InGaN layers grown prior to a conventional GaN/AlN/AlInN FET structure control of the channel width at the GaN/AlN interface is obtained. The composition of the InGaN layer was graded from nominally xIn = 30 % to pure GaN just below the AlN/AlInN interface. Simulations reveal the impact of the additional InGaN layer on the potential well width which controls the sheet carrier density within the channel region of the devices. Benchmarking the InxGa1−xN/GaN/AlN/Al0.87In0.13N based FETs against GaN/AlN/AlInN FET reference structures we found increased maximum current densities of ISD = 1300 mA/mm (560 mA/mm). In addition, the InGaN layer helps to achieve broader transconductance profiles as well as reduced leakage currents.

Optimization of Graded AlInN/AlN/GaN HEMT Device Performance Based on Quaternary Back Barrier for High Power Application

“…3b, at the channel and buffer further strengthens the fact that carriers have escalated speed along the essential regions leading to higher cutoff frequency and better RF performance as well. 38 The improvement in electric field as shown in Fig. 5, is significant but non-uniform.…”

“…This brings the benefit in increasing gate length. 38 Due to the smoothening of electric field while increasing gate length beyond optimum range, it makes it harder for the electrons along the 2DEG to roam freely and hence maximum current density is decreased including the transconductance. Earlier experiments have also disclosed that increasing Lg beyond an optimum point of 0.8 um declines the output power density of HFETs.…”

“…Theoretically, this phenomenon also enhances piezoelectric polarization and increases conduction band discontinuity leading to greater drain current. 38 When the barrier is graded what happens is that a polarization gradient is formed and a 3D electron slab is created across the entire barrier region; improving DC performance.…”

Conduction band fluctuation scattering due to alloy clustering in barrier layers in InAlN/GaN heterostructures

“…[1][2][3] More importantly, in-plane lattice-matched InAlN/GaN heterostructures can be obtained by adopting InAlN layers with the In mole fraction of around 0.18, therefore, the inverse piezoelectric effect of GaNbased high electron mobility transistors under high voltage operation can be avoided. 4 Substantial progress in InAlN/GaN research has been made over the past ten years, but crystal imperfections are still a major obstacle to realize high performance InAlN/GaN HEMTs.…”