Enhanced Key Expansion for AES-256 by using Even-Odd method

Saberi, Iman; Shojaie, Bahareh; Salleh, Mazleena

doi:10.1109/icriis.2011.6125708

Cited by 14 publications

(6 citation statements)

References 6 publications

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“…A Key Schedule is an algorithm that gives those round keys for each round [4]. Suppose, each word length w i = 32 bits = 4 bytes.…”

Section: 2key Expansionmentioning

confidence: 99%

Security Analysis of AES and Enhancing its Security by Modifying S-Box with an Additional Byte

Mamun¹,

Rahman²,

Shaon³

et al. 2017

IJCNC

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Secured and opportune transmission of data alwaysis a significant feature for any organization. Robust encryption techniques and algorithms always facilitate in augmenting secrecy, authentication and reliability of data. At present, Advanced Encryption Standard (AES) patronized by NIST is the most secure algorithm for escalating the confidentiality of data. This paper mainly focuses on an inclusive analysis related to the security of existing AES algorithm and aim to enhance the level security of this algorithm. Through some modification of existing AES algorithm by XORing an additional byte with s-box value

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“…A Key Schedule is an algorithm that gives those round keys for each round [4]. Suppose, each word length w i = 32 bits = 4 bytes.…”

Section: 2key Expansionmentioning

confidence: 99%

Security Analysis of AES and Enhancing its Security by Modifying S-Box with an Additional Byte

Mamun¹,

Rahman²,

Shaon³

et al. 2017

IJCNC

View full text Add to dashboard Cite

show abstract

“…After Key N+1 0 and Key N+1 1 are obtained, two judgement modules are added in the proposed scheme to calculate Key N+1 2 and Key N+1 3. This is inspired by [21], where RoundKeys are formed based on the even and odd positions of generated words. The operations in the judgement modules are If (judge bit == 1) out = operand 1 ⊕ (operand 2 ≪ 16)…”

Section: New Schemementioning

confidence: 99%

“…After Key N +1 0 and Key N +1 1 are obtained, two judgement modules are added in the proposed scheme to calculate Key N +1 2 and Key N +1 3. This is inspired by [21], where RoundKeys are formed based on the even and odd positions of generated words. The operations in the judgement modules are

\begin{matrix} right leftthickmathspace.5em \\ If (judge_bit = = 1) \\ out = operand_1 \oplus (operand_2 ≪ 16) \\ else \\ out = operand_1 \oplus (operand_2 ≪ 8) \end{matrix}

where judge_bit is the judgement input, operand_1/2 are the two inputs, out is the output of the judgement module and

≪

represents the left rotation.…”

Section: New Key Expansion Schemementioning

confidence: 99%

High throughput and secure advanced encryption standard on field programmable gate array with fine pipelining and enhanced key expansion

Liu

Yuan

2015

IET Computers & Digital Techniques

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Aiming at protection of high speed data, field programmable gate array (FPGA)-based advanced encryption standard (AES) design is proposed here. Deep investigation into the logical operations of AES with regard to FPGA architectures leads to two efficient pipelining structures for the AES hardware implementation. The two design options allow users to make a trade-off among speed, resource usage and power consumption. In addition, a new key expansion scheme is proposed to address the potential issues of existing key expansion scheme used in AES. The proposed key expansion scheme with additional nonlinear operations increases the complexity of cracking keys by up to 2 (N − 1) times for N-round AES. The proposed design is evaluated on various FPGA devices and is compared with several existing AES implementations. In terms of both throughput and throughput per slice, the proposed design can overcome most existing designs and achieves a throughput of 75.9 Gbps on a latest FPGA device. Two parallel implementations of the proposed design can meet the real-time encryption/decryption demand for 100 Gbps data rate. Furthermore, the proposed AES design is implemented on the Zynq xc7z020 FPGA platform, demonstrating its application to image encryption.

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“…RECTANGLE using bit-slice techniques is a lightweight block cipher with a similar motivation. Bit-slice technique was proposed by E. Biham in 1997 [9]. The bit-slice techniques can not only improve the performance of software, but also resist the cache time attacks and reduce the cost of protected channel attacks.…”

Section: Introductionmentioning

confidence: 99%

SCENERY: a lightweight block cipher based on Feistel structure

Feng

2021

Front. Comput. Sci.

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In this paper, we propose a new lightweight block cipher called SCENERY. The main purpose of SCENERY design applies to hardware and software platforms. SCENERY is a 64-bit block cipher supporting 80-bit keys, and its data processing consists of 28 rounds. The round function of SCEN-ERY consists of 8 4 × 4 S-boxes in parallel and a 32 × 32 binary matrix, and we can implement SCENERY with some basic logic instructions. The hardware implementation of SCENERY only requires 1438 GE based on 0.18 um CMOS technology, and the software implementation of encrypting or decrypting a block takes approximately 1516 clock cycles on 8bit microcontrollers and 364 clock cycles on 64-bit processors. Compared with other encryption algorithms, the performance of SCENERY is well balanced for both hardware and software. By the security analyses, SCENERY can achieve enough security margin against known attacks, such as differential cryptanalysis, linear cryptanalysis, impossible differential cryptanalysis and related-key attacks.

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Enhanced Key Expansion for AES-256 by using Even-Odd method

Cited by 14 publications

References 6 publications

Security Analysis of AES and Enhancing its Security by Modifying S-Box with an Additional Byte

Security Analysis of AES and Enhancing its Security by Modifying S-Box with an Additional Byte

High throughput and secure advanced encryption standard on field programmable gate array with fine pipelining and enhanced key expansion

SCENERY: a lightweight block cipher based on Feistel structure

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