Energy efficiency of adiabatic superconductor logic

Takeuchi, Naoki; Yamanashi, Yuki; Yoshikawa, Nobuyuki

doi:10.1088/0953-2048/28/1/015003

Cited by 62 publications

(35 citation statements)

References 34 publications

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“…Thus a similar critical current density can be used, which simplifies the testing of the circuits at 4.2 K. The amplitude of the output current of the AQFP is in the range of a few tens of microamps. If we assume a 5-GHz clock frequency, the switching energy of the AQFP gate per bit is estimated to be 0.5 zJ [25], which is six orders of magnitude better than that of semiconductor circuits and two orders of magnitude better than that of SFQ circuits. When we integrate 1,000,000-gate AQFP circuits, the total power consumption is estimated to be about 2.5 μW at a 5-GHz clock frequency.…”

Section: Aqfp Circuitsmentioning

confidence: 99%

Superconducting Digital Electronics for Controlling Quantum Computing Systems

Yoshikawa

2019

IEICE Trans. Electron.

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The recent rapid increase in the scale of superconducting quantum computing systems greatly increases the demand for qubit control by digital circuits operating at qubit temperatures. In this paper, superconducting digital circuits, such as single-flux quantum and adiabatic quantum flux parametron circuits are described, that are promising candidates for this purpose. After estimating their energy consumption and speed, a conceptual overview of the superconducting electronics for controlling a multiple-qubit system is provided, as well as some of its component circuits. key words: qubit, quantum computing, single-flux quantum circuit, adiabatic quantum flux parametron circuit, superconducting integrated circuits Nobuyuki Yoshikawa received the B.E., M.E., and Ph.D. degrees in electrical and computer engineering from Yokohama National University, Japan, in 1984Japan, in , 1986Japan, in , and 1989, respectively. Since 1989, he has been with the Department of Electrical and Computer Engineering, Yokohama National University, where he is currently a Professor. His research interests include superconductive devices and their application in digital and analog circuits. He is also interested in single-electron-tunneling devices, quantum computing devices and cryo-CMOS devices. He is a member of

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Section: Aqfp Circuitsmentioning

confidence: 99%

Superconducting Digital Electronics for Controlling Quantum Computing Systems

Yoshikawa

2019

IEICE Trans. Electron.

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“…SFQ logic families are divided into two groups: ac-biased and dc-biased. Adiabatic Quantum Flux Parametron (AQFP) [10], [11] and Reciprocal Quantum Logic (RQL) [12] are examples of ac-biased and RSFQ [1] is an example for dcbiased logic family. The first version of new SFQ logic relied on having ohmic resistors for interconncetion of JJs, hence, is called Resistive Single Flux Quantum logic [13].…”

Section: Background a Background On Sfq Logic Circuitsmentioning

confidence: 99%

PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic Circuits

Pasandi

Pedram

2019

IEEE Trans. Appl. Supercond.

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This paper presents a path balancing technology mapping algorithm, which is a new algorithm for generating a mapping solution for a given Boolean network such that the average logic level difference among fanin gates of each gate in the network is minimized. Path balancing technology mapping is required in dc-biased Single Flux Quantum (SFQ) circuits for guaranteeing the correct operation, and it is beneficial in CMOS circuits to reduce the hazard issues. We present a dynamic programming based algorithm for path balancing technology mapping which generates optimal solutions for dc-biased SFQ (e.g. Rapid SFQ or RSFQ) circuits with tree structure and acts as an effective heuristic for circuits with general Directed Acyclic Graph (DAG) structure. Experimental results show that our path balancing technology mapper reduces the balancing overhead by up to 2.7× and with an average of 21% compared to the stateof-the-art academic technology mappers.

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“…Moreover, the above calculation results show that heat is not where the first term on the right-hand side represents free energy dissipation, the second term on the right-hand side represents the heat due to logical entropy change, and Θ is the energy-delay product (EDP) of the system, which is independent of temperature. In AQFP logic, the energy scale is given by I c Φ 0 , and the time scale is given by Φ 0 /I c R sg [33], where R sg is the sub-gap resistance and shows the damping condition of Josephson junctions, and hence the EDP of an AQFP gate should be proportional to I c Φ 0 2 /(I c R sg ). By using the fitting curves shown in Fig.…”

Section: Free Energy Dissipation Required For a Logically Irrevermentioning

confidence: 99%

Minimum energy dissipation required for a logically irreversible operation

Takeuchi

Yoshikawa

2018

Phys. Rev. E

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According to Landauer's principle, the minimum heat emission required for computing is linked to logical entropy, or logical reversibility. The validity of Landauer's principle has been investigated for several decades and was finally demonstrated in recent experiments by showing that the minimum heat emission is associated with the reduction in logical entropy during a logically irreversible operation. Although the relationship between minimum heat emission and logical reversibility is being revealed, it is not clear how much free energy is required to be dissipated for a logically irreversible operation. In the present study, in order to reveal the connection between logical reversibility and free energy dissipation, we numerically demonstrated logically irreversible protocols using adiabatic superconductor logic. The calculation results of work during the protocol showed that, while the minimum heat emission conforms to Landauer's principle, the free energy dissipation can be arbitrarily reduced by performing the protocol quasistatically. The above results show that logical reversibility is not associated with thermodynamic reversibility, and that heat is not only emitted from logic devices but also absorbed by logic devices. We also formulated the heat emission from adiabatic superconductor logic during a logically irreversible operation at a finite operation speed.

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Energy efficiency of adiabatic superconductor logic

Cited by 62 publications

References 34 publications

Superconducting Digital Electronics for Controlling Quantum Computing Systems

Superconducting Digital Electronics for Controlling Quantum Computing Systems

PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic Circuits

Minimum energy dissipation required for a logically irreversible operation

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