Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions

Tomita, Kazuo; Migita, Tomohiro; Shimonishi, Satoshi; Shibata, Tadashi; Ohmi, Tadahiro; Nitta, T.

doi:10.1149/1.2048641

Cited by 24 publications

(4 citation statements)

References 1 publication

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“…Special attention has to be given to ion implantation where the effects such as sputtering, [3] cross contamination from previous implantation steps, [4] and mass interference (e.g., BF 2 and Mo [5] ) are often the origin of metallic contamination. Examples of Al sputtering during P þ implantation at 45 keV and As þ at 25 keV, [6] respectively, and Fe sputtering during an As þ implantation at 60 keV, [7] are illustrated in Figure 1. For a detailed analysis, one has to take into account the type of implanted species, the dose, and the energy and the metal that is sputtered away.…”

Section: Metal Contamination and Device Processingmentioning

confidence: 99%

Device Performance as a Metrology Tool to Detect Metals in Silicon

Claeys

Simoen

2019

Physica Status Solidi (a)

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Herein, the impact of transition metals (TMs) on the electrical device performance, i.e., carrier lifetime, leakage current, low‐frequency noise, photocurrent, and solar cell efficiency is reviewed. Defect information is obtained by using either simple device structures such as metal‐oxide‐semiconductor (MOS) capacitors and pn‐diodes or transistors. The impact of metals on complementary MOS (CMOS) image sensors (CIS) and solar cells is also briefly addressed. Scaled devices are a power tool to detect small‐sized defect clusters or even single metal atoms. Examples are given for a variety of both slow‐ and fast‐diffusing metals. The final section outlines the power of density functional theory (DFT) ab initio calculations to support the experimental observations and to get a deeper physical insight into the defect structure.

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Section: Metal Contamination and Device Processingmentioning

confidence: 99%

Device Performance as a Metrology Tool to Detect Metals in Silicon

Claeys

Simoen

2019

Physica Status Solidi (a)

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“…Metal contamination (Tomita et al, 1995) and various forms of cross-contamination between related implantation processes (Haas et al, 1978) are problems of significant concern. Contamination originates primarily from surfaces irradiated by the ion beam, such as process disks, dummy wafers, and various locations on the equipment body.…”

Section: Concentration Concentrationmentioning

confidence: 99%

Formation of Ultra-Shallow Junctions

Seebauer

Gorai

2011

Comprehensive Semiconductor Science and Technology

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“…[1][2][3] Most metallic contamination occurs during wafer processing, particularly reactive ion etching and ion implantation [4][5][6] and here it has been reported that metals transported with dopant ion from an ion source or acceleration tube in ion implantation equipment can be deposited on silicon surfaces. 5,6 On the other hand, the behavior of surface metal impurities penetrating by the collision with a dopant ion has not been known. The ion implantation may assist surface metal impurities penetrating the screen films and silicon.…”

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confidence: 95%

Behavior of Transition Metals Penetrating Silicon Substrate through SiO₂and Si₃N₄Films by Arsenic Ion Implantation and Annealing

Saga¹,

Ohno²,

Shibata

et al. 2015

ECS J. Solid State Sci. Technol.

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The behavior of metals penetrating the silicon substrate through a screen SiO 2 or Si 3 N 4 film by the collision of arsenic ion and surface metals are quantitatively demonstrated. We have found using silicon step etching followed by ICP-MS and SIMS that 0.1∼8% of surface metals (Fe, Cr, Ni, Cu, and W) penetrate silicon even when implanted through screen SiO 2 film, depending on metal species and the film thickness. The surface metals on a CVD Si 3 N 4 film can also penetrate into the silicon during ion implantation and/or subsequent annealing. W is most difficult to penetrate the thermally-grown SiO 2 film, while W and Cr can easily penetrate a CVD Si 3 N 4 films. We have also found using microwave photoconductive decay measurements that recombination centers are generated in silicon by low level metal penetration even when implanted through screen Metallic contamination on silicon surfaces has a detrimental impact on the performance and yield of ULSI devices. Surface metal impurities degrade the gate oxide integrity while metal impurities dissolved in silicon cause recombination centers and these result in junction leakage, degrade retention characteristics in DRAMs, and cause dark currents in image sensors. Surface metal impurities often penetrate the silicon by thermal diffusion in ULSI processing. The diffusion behavior of these metal impurities in silicon is well-known. [1][2][3] Most metallic contamination occurs during wafer processing, particularly reactive ion etching and ion implantation 4-6 and here it has been reported that metals transported with dopant ion from an ion source or acceleration tube in ion implantation equipment can be deposited on silicon surfaces. 5,6 On the other hand, the behavior of surface metal impurities penetrating by the collision with a dopant ion has not been known. The ion implantation may assist surface metal impurities penetrating the screen films and silicon. The collided metal atoms' penetrating silicon can be prevented by screen films such as SiO 2 or Si 3 N 4 films, 7 in which the diffusion coefficients of metal impurities such as Ni and Cu are smaller than in Si. 8 In this paper, the behavior of metals penetrating the silicon substrate through a thermally grown SiO 2 or CVD Si 3 N 4 film by the collision of dopant ion and surface metals and subsequent annealing are quantitatively demonstrated. The generation of recombination centers due to the metal penetrating silicon is also discussed. ExperimentalCzochralski (CZ) Si (100), (p-type, 8-12 cm), 200 mm diam. wafers were used in this study. A group of wafers was oxidized to form silicon oxides on the surface. The thickness of the silicon oxide was 5 nm, 20 nm, 80 nm, 120 nm, and 160 nm. A Si 3 N 4 film was deposited on the surface of another group of wafers at 700• C by low pressure CVD. The thickness of the Si 3 N 4 film was 20 nm.Next, the silicon wafers were cleaned with NH 4 OH/H 2 O 2 /H 2 O mixture and HCl/H 2 O 2 /H 2 O mixture. The surfaces of the SiO 2 and Si 3 N 4 films of the wafers were hydrophilic. ...

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Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions

Cited by 24 publications

References 1 publication

Device Performance as a Metrology Tool to Detect Metals in Silicon

Device Performance as a Metrology Tool to Detect Metals in Silicon

Formation of Ultra-Shallow Junctions

Behavior of Transition Metals Penetrating Silicon Substrate through SiO₂and Si₃N₄Films by Arsenic Ion Implantation and Annealing

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Eliminating Metal‐Sputter Contamination in Ion Implanter for Low‐Temperature‐Annealed, Low‐Reverse‐Bias‐Current Junctions

Cited by 24 publications

References 1 publication

Device Performance as a Metrology Tool to Detect Metals in Silicon

Device Performance as a Metrology Tool to Detect Metals in Silicon

Formation of Ultra-Shallow Junctions

Behavior of Transition Metals Penetrating Silicon Substrate through SiO2and Si3N4Films by Arsenic Ion Implantation and Annealing

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Product

Resources

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Behavior of Transition Metals Penetrating Silicon Substrate through SiO₂and Si₃N₄Films by Arsenic Ion Implantation and Annealing