Electrical Properties of Excimer-Laser-Crystallized Lightly Doped Polycrystalline Silicon Films

Abstract

The electrical properties of excimer-laser-crystallized lightly phosphorus-doped polycrystalline silicon films were investigated. The electrical conductivity of the films increased from 6.0 × 10 −7 to 2.3 × 10 −1 S/cm as the laser energy density increased from 235 to 436 mJ/cm 2 because the carrier concentration varied from 1.0 × 10 11 to 1.8 × 10 17 cm −3. In contrast, the carrier mobility was 37.3 and 8.7 cm 2 /V•s at low-and high-laser-energy regimes, respectively, and showed a minimum value of 0.24 cm 2 /V•s at the intermediate laser energy density of 315 mJ/cm 2. These results can be well explained by a model featuring the localization of trap states at the grain boundary.

Pulsed-Laser-Induced Microcrystallization and Amorphization of Silicon Thin Films

“…The decrease in the electrical conductivity of the Si film beyond 560 mJ/cm 2 indicates the occurrence of microcrystallization. 13) This was also confirmed by TEM observation which will be discussed later. As shown in Fig.…”

“…By carrying out a current-voltage measurement of laser-irradiated lightly doped Si films, the microcrystallization or amorphization is instantly confirmed because of their abrupt change in electrical conductivity under these conditions. 9,13) By combining the in-situ measurements and postlaser-irradiation electrical measurements, precise observation of the melt, and solidification and confirmation of the resulting crystalline phase were performed. Transient measurements were performed on both lightly doped and nondoped Si films in order to observe the contribution of dopants to the melt and solidification dynamics.…”

High Performance p-type SnO thin-film Transistor with SiOxGate Insulator Deposited by Low-Temperature PECVD Method

“…Generally, the small grain size of the polycrystalline thinfilm has been known to decrease the carrier mobility due to the increased number of grain boundaries. However, several papers regarding the polycrystalline silicon thinfilm [12] and pentacene-based organic TFTs [13] reported the opposite trend between mobility and grain size (increasing mobility with a decreasing grain size), and this inconsistency has been explained based on the Seto's localized-trap-states model. The localized-trapstates model correlates the grain size of the polycrystalline thin-film with the carrier concentration and carrier mobility based on the assumption that crystallites of the polycrystalline thin-films have very low trap state density inside the grain, and that most trap states are localized at the grain boundary.…”

“…Figs. 4(a)-(c) schematically show the variation of the trap density and the resulting band diagram with respect to the grain size in polycrystalline p-type semiconductor materials [11,12]. Here, N t is the trap density per area, L is the average grain size, n is the carrier (hole) concentration, and E b is the potential barrier height at the grain boundary.…”

Low Temperature Process Technologies for the Next Generation High Performance Polycrystalline Silicon Thin-Film Transistors

“…The carrier trapping by these defects (trap states) governs the electrical properties of the poly-Si film. For example, the electrical conductivity of lightly doped poly-Si films show a wide range variation depending on the laser energy density [15]. Phosphorus atoms with the concentration of 7.4x10 17 cm -3 were introduced to a 50 nm-thick a-Si film and this film was laser-crystallized.…”