Electrical behavior of atomic layer deposited high quality SiO2 gate dielectric

Abstract

Comprehensive and systematic electrical studies were performed on fabrication of high quality SiO 2 thin films MOS capacitor using the robust, novel, and simple atomic layer deposition (ALD) technique using highly reactive ozone and tris (dimethylamino) silane (TDMAS) precursors. Ideal capacitance-voltage curve exhibits a very small frequency dispersion and hysteresis behavior of the SiO 2 MOS capacitor grown at 1 s TDMAS pulse, suggesting excellent interfacial quality and purity of the film as probed using x-ray photoelectron studies. The flat-band voltage of the device shifted from negative toward positive voltage axis with increase of TDMAS pulses from 0.2 to 2 s. Based on an equivalent oxide thickness point of view, all SiO 2 films have gate leakage current density of (5.18 Â 10 À8 A/cm 2 ) as well as high dielectric break down fields of more than ($10 MV/cm), which is better and comparable to that of thermally grown SiO 2 at temperatures above 800 C. These appealing electrical properties of ALD grown SiO 2 thin films enable its potential applications such as high-quality gate insulators for thin film MOS transistors, as well as insulators for sensor and nanostructures on nonsilicon substrates.

Performance of MOS Capacitor with Different Dielectric Material Simulated Using Silvaco TCAD Tools

“…We used Silvaco TCAD tools to simulate the two types of MOS capacitor having SiO2 and Si3N4 as dielectric layer. The result for capacitance-voltage (C-V) and current-voltage (I-V) characteristics are extracted to compare the performance of MOS capacitor [9,10,11,12].…”