Efficient time synchronization of 1588v2 technology in packet network

Xie, Lu; Wu, Yonghong; Wang, Jinwei

doi:10.1109/iccsn.2011.6014030

Cited by 2 publications

(2 citation statements)

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“…When a PTP message traverses the protocol stack in a node, it is queued in the buffer to process, which is a fluctuating value and will affect the synchronization accuracy. To achieve the best possible results, the IEEE 1588 time stamps should be generated in hardware or the timestamp should be captured as close as possible to the hardware or the NIC card [24].…”

Section: Process Of Time Stampingmentioning

confidence: 99%

“…Network L. Xie et al [29] proposed a multicast mechanism supported by the hardware over a packet network in order to improve the synchronization accuracy between the master and the slave clock. The proposed method focused on factors such as the location of the time stamps, frequency difference, delay asymmetry and error accumulation, which affects the synchronization accuracy.…”

Section: Ieee 1588v2 Synchronization Using Multicast Mechanism In a Pmentioning

confidence: 99%

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Delay Asymmetry Correction Model for IEEE 1588 Synchronization Protocol

Rahman¹

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The thesis proposes a delay asymmetry correction (DAC) model to enhance the IEEE 1588 synchronization protocol. The purpose of this work is to mitigate the effects of unpredictable packet delay variations (PDV), which cause asymmetric link delays on timing packets, in order to improve the synchronization accuracy of the slave clock with respect to the master clock. This is done by computing the time difference between the master and the slave clock in the presence of traffic in a network. The NS-2 results indicate that the proposed solution improves the slave accuracy by measuring the correct offset value in a slave clock for asymmetric communication link delays. The solution results show that the slave clock is able to achieve high synchronization accuracy in the presence of various bi-directional traffic loads, network congestions, and temporary network outage. Furthermore, when there is a routing path change due to the failure in the network, the solution also improves the accuracy of the slave clock with respect to the master clock. However, the proposed solution does not perform well when it is incorporated with the AOCM model.iii

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Section: Process Of Time Stampingmentioning

confidence: 99%

Section: Ieee 1588v2 Synchronization Using Multicast Mechanism In a Pmentioning

confidence: 99%