Efficient realisation of arithmetic algorithms with weighted collection of posibits and negabits

Abstract

Most common uses of negatively weighted bits (negabits), normally assuming arithmetic value 21(0) for logical 1(0) state, are as the most significant bit of 2's-complement numbers and negative component in binary signed-digit (BSD) representation. More recently, weighted bit-set (WBS) encoding of generalised digit sets and practice of inverted encoding of negabits (IEN) have allowed for easy handling of any equally weighted mix of negabits and ordinary bits (posibits) via standard arithmetic cells (e.g., half/full adders, compressors, and counters), which are highly optimised for a host of simple and composite figures of merit involving delay, power, and area, and are continually improving due to their wide applicability. In this paper, we aim to promote WBS and IEN as new design concepts for designers of computer arithmetic circuits. We provide a few relevant examples from previously designed logical circuits and redesigns of established circuits such as 2's-complement multipliers and modified booth recoders. Furthermore, we present a modulo-(2 n + 1) multiplier, where partial products are represented in WBS with IEN. We show that by using standard reduction cells, partial products can be reduced to two. The result is then converted, in constant time, to BSD representation and, via simple addition, to final sum.

Truncated ternary multipliers

“…In discussing ternary arithmetic, we opt to represent the three digit values as N (−1), Z (0), and P (+1) to distinguish digit values from possible encodings of these values, which may involve the use of posibits in {0, 1} and negabits in {−1, 0} [24]. Thus, whereas −1 is one of the two possible values of a single negabit, the ternary digit N may have a 2‐bit encoding consisting of a negabit and a posibit.…”

Arithmetic with binary-encoded balanced ternary numbers

“…= 24 ways of assigning 3 of the 4 possible 2-bit codes to the three digit values N, Z, and P. For example, one can use a 2-bit 2's-complement code for the three digit values: N (11), Z (00), and P (01). Our prior experience [Jabe12] with the use of posibits (normal bits, assuming values in {0, 1}) and negabits (negatively weighted bits, assuming values in {-1, 0}) leads us to use the n, p encoding for balanced ternary digits: N (10), Z (00 or 11), and P (01). Note that allowing 11 to denote Z, rather than using it as a don't-care state, relieves us from the burden of watching out for this combination and setting it to 00 whenever encountered.…”

Efficient hardware realization of signed arithmetic operation using IEN

“…The inverted encoding of negabits (IEN) representation [8,9] is used for signed digit number where arithmetic value -1 (0) is denoted as 0 (1). In this paper, we show how hardware realization of conventional adder is similar to the proposed adder using IEN representation.…”