Efficient Parallel Video Processing Techniques on GPU: From Framework to Implementation

Abstract

Through reorganizing the execution order and optimizing the data structure, we proposed an efficient parallel framework for H.264/AVC encoder based on massively parallel architecture. We implemented the proposed framework by CUDA on NVIDIA's GPU. Not only the compute intensive components of the H.264 encoder are parallelized but also the control intensive components are realized effectively, such as CAVLC and deblocking filter. In addition, we proposed serial optimization methods, including the multiresolution multiwindow for motion estimation, multilevel parallel strategy to enhance the parallelism of intracoding as much as possible, component-based parallel CAVLC, and direction-priority deblocking filter. More than 96% of workload of H.264 encoder is offloaded to GPU. Experimental results show that the parallel implementation outperforms the serial program by 20 times of speedup ratio and satisfies the requirement of the real-time HD encoding of 30 fps. The loss of PSNR is from 0.14 dB to 0.77 dB, when keeping the same bitrate. Through the analysis to the kernels, we found that speedup ratios of the compute intensive algorithms are proportional with the computation power of the GPU. However, the performance of the control intensive parts (CAVLC) is much related to the memory bandwidth, which gives an insight for new architecture design.

Embedded Real-Time H264/AVC High Definition Video Encoder on TI’s KeyStone Multicore DSP

“…Some works have achieved the real-time compliant for low resolution but not yet for higher resolutions. GPU implementation [17] allows performing a real-time HD video encoding thanks to the great number of processing cores. However, this proposed scheme induces some rate distortion (PSNR degradation and bitrate increase).…”

“…Huayou Su et al [17] proposed a parallel framework for the H264/AVC encoder based on a massively parallel architecture implemented on NVIDEA's GPU (Graphic Processor Unit) using CUDA (Compute Unified Device Architecture). They presented several optimizations to accelerate the encoding speed.…”

Real-time H264/AVC encoder based on enhanced frame level parallelism for smart multicore DSP camera

“…Su et al [25] introduced a parallel framework for H.264/ AVC encoder based on massively parallel architecture implemented on NVIDEA's GPU using CUDA. They presented several optimizations to accelerate the encoding speed on GPU.…”

“…Multi-processor, multicore, multithreading encoding system and parallel algorithms have been discussed in many papers [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28]. This paper presents the frame level parallelism (FLP) approach and describes its complete implementation for H.264/AVC encoder using a multicore DSP TMS320C6472.…”

Cuda Implementation of Nonlocal Means Algorithm for Gpu Processors

“…Parallelization of algorithm is one of the efficient ways to shorten the time requirement of complex problems. In a standalone system, parallelization can be achieved with multiple CPUs (cores), or GPUs [Su et al, (2014)], [Kadah et al, (2011)], [L. Wang et al, (2013)], [X et al, (2016)]. The limitation of cores in a CPU motivated the development of General Purpose computing on Graphics Processing Units (GP-GPU), with capabilities of performing computations generally executed by a CPU.…”