Real-time H264/AVC encoder based on enhanced frame level parallelism for smart multicore DSP camera

Abstract

International audienceThe latest generation of multicore digital signal processors (DSP), their high computing power, low consumption, and integrated peripherals will allow them to be embedded in the next generation of smart camera. Such DSPs allow designers to evolve the vision landscape and simplify the developer’s tasks to run more complex image and video processing applications without the need to burden a separate personal computer. This paper explains the exploitation of the computing power of a multicore DSP TMS320C6472 to implement a real-time H264/AVC video encoder. This work can be considered as a milestone for the implementation of the new High Efficiency Video Coding standard (HEVC-H265). In fact, to improve the encoding speed, enhanced Frame Level Parallelism (FLP) approach is presented and implemented. A real-time fully functional video demo is given, taken into account video capture and bitstream storage. Experimental results show how we efficiently exploit the potentials and the features of the multicore platform without inducing video quality degradation in terms of PSNR or bitrate increase. The enhanced FLP using five DSP cores achieves a speedup factor of more than four times in average compared to a mono-core implementation for Common Intermediate Format (CIF 352 × 288), Standard Definition (SD 720 × 480), and High Definition (HD 1280 × 720) resolutions. This optimized implementation allows us to meet the real-time compliant by reaching an encoding speed of 99 f/s (frame/second) and 30 f/s for CIF and SD resolutions respectively, and saves up to 77 % of encoding time for HD resolution

Fast Motion Estimation’s Configuration Using Diamond Pattern and ECU, CFM, and ESD Modes for Reducing HEVC Computational Complexity

“…It is urbanized to overcome the enormous amount of UHD video contents. Compared to the earlier H.264/AVC [3] standard and at the identical visual quality, HEVC guarantees a high encoding performance, reaching 50% of bitrate [4]. Facing to this immense huge encoding performance, a huge computational complexity is obtained.…”

Optimised HEVC encoder intra‐only configuration

“…This great consumption of high‐video resolutions may lead to some problems in terms of data storage cost and transmission bandwidth. The actual commercialised H.264/AVC [1] video encoder will not be able to manage this great data flow while keeping a good video quality with low bitrate. To overcome these constraints, the International Video Coding Expert Group ITU‐T (VCEG) and the Joint Video Coding Team (ISO/IEC) Moving Express Group (MPEG) have developed the new generation of video coding standard, which is the high‐efficiency video coding (HEVC) [2].…”