2006
DOI: 10.1155/asp/2006/58263
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Efficient and Secure Fingerprint Verification for Embedded Devices

Abstract: This paper describes a secure and memory-efficient embedded fingerprint verification system. It shows how a fingerprint verification module originally developed to run on a workstation can be transformed and optimized in a systematic way to run real-time on an embedded device with limited memory and computation power. A complete fingerprint recognition module is a complex application that requires in the order of 1000 M unoptimized floating-point instruction cycles. The goal is to run both the minutiae extract… Show more

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Cited by 12 publications
(6 citation statements)
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References 18 publications
(18 reference statements)
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“…Based on optimizations at algorithm, hardware and software levels, it is possible to achieve an execution time performance for the complete recognition process, that is, fingerprint acquisition, feature extraction and matching tasks, of less than 4 seconds, which represents a speed-up of 脳153.8 with regard to the initial execution time. The execution time optimization ratio achieved in our work when implementing the fingerprint recognition module by means of hardware-software co-design techniques results higher than in [53]. c) In [54] authors implement a fingerprint recognition system able to perform the complete recognition process in less than 200 ms on a Virtex-E FPGA with more than 2M system gates.…”
Section: Performance Evaluation Under Sopc Platformmentioning
confidence: 78%
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“…Based on optimizations at algorithm, hardware and software levels, it is possible to achieve an execution time performance for the complete recognition process, that is, fingerprint acquisition, feature extraction and matching tasks, of less than 4 seconds, which represents a speed-up of 脳153.8 with regard to the initial execution time. The execution time optimization ratio achieved in our work when implementing the fingerprint recognition module by means of hardware-software co-design techniques results higher than in [53]. c) In [54] authors implement a fingerprint recognition system able to perform the complete recognition process in less than 200 ms on a Virtex-E FPGA with more than 2M system gates.…”
Section: Performance Evaluation Under Sopc Platformmentioning
confidence: 78%
“…Unlike our work, no real-time performance is reached in [52], but acceleration ratios in the range of 脳17.1 are achieved. b) In [53] authors are able to implement a whole AFAS application in a 50 MHz embedded system based on…”
Section: Performance Evaluation Under Sopc Platformmentioning
confidence: 99%
“…It is noted that for minutia-based solutions the performance is compromised for features with less than 500 bytes, as reported in [ 35 ] where 1000 bytes are employed (by assuming 80 minutiae and 12.5 bytes for each minutia). The minutia-based feature of the embedded fingerprint recognition solution reported in [ 36 ] employs an average size of 512 bytes.…”
Section: Resultsmentioning
confidence: 99%
“…In most of proposals in the literature, the wearables are employed for biometric data acquisition but the recognition algorithm is performed outside the wearable because the algorithms are computationally complex [ 49 , 50 , 51 , 52 ]. The fingerprint-based solutions implemented as software in embedded devices (like [ 36 ]) have a high power consumption or response time that is not suitable for many sensors, as was shown in Table 1 . In order to reduce power consumption and response time, other authors design dedicated hardware for fingerprint recognition [ 53 , 54 , 55 ].…”
Section: Resultsmentioning
confidence: 99%
“…Shenglin Yang et al [29] created another efficient and secure fingerprint verification module for the embedded devices. The authors explored the methodology of hardware and software consign that gained a 65% execution time reduction with less than half the energy consumption compared with the original system.…”
Section: B Related Workmentioning
confidence: 99%