Effects of the microstructure of copper through-silicon vias on their thermally induced linear elastic mechanical behavior

Wu, Zhiyong; Huang, Zhiheng; Ma, Yucheng; Xiong, Hua; Conway, Paul

doi:10.1007/s13391-013-3053-y

Cited by 16 publications

(4 citation statements)

References 24 publications

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“…The newest electronic packaging technology in the form of vertical stack bonding of interconnected device layers is required to develop 3D ICs. [1][2][3][4][5][6][7][8] Flip-chip packaging technology has been widely used in the electronics industry in recent years as high performance and miniaturized electronics have become more common. However, solder bumps are limited to applications with a fine pitch of less than 100 µm due to the bump bridging between adjacent bumps.…”

Section: Introductionmentioning

confidence: 99%

Effect of Cu–Sn intermetallic compound reactions on the Kirkendall void growth characteristics in Cu/Sn/Cu microbumps

Park

Kim

Jeong³

et al. 2014

Jpn. J. Appl. Phys.

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Growth behaviors of intermetallic compounds (IMCs) and Kirkendall voids in Cu/Sn/Cu microbump were systematically investigated by an in-situ scanning electron microscope observation. Cu-Sn IMC total thickness increased linearly with the square root of the annealing time for 600 h at 150°C, which could be separated as first and second IMC growth steps. Our results showed that the growth behavior of the first void matched the growth behavior of second Cu 6 Sn 5 , and that the growth behavior of the second void matched that of the second Cu 3 Sn. It could be confirmed that double-layer Kirkendall voids growth kinetics were closely related to the Cu-Sn IMC growth mechanism in the Cu/Sn/Cu microbump, which could seriously deteriorate the mechanical and electrical reliabilities of the fine-pitch microbump systems.

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Section: Introductionmentioning

confidence: 99%

Effect of Cu–Sn intermetallic compound reactions on the Kirkendall void growth characteristics in Cu/Sn/Cu microbumps

Park

Kim

Jeong³

et al. 2014

Jpn. J. Appl. Phys.

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“…Although some experimental studies [22,23] have shown that stress distribution correlates with the Cu microstructure, there is a lack of quantitative analysis of the microstructure effect on thermo-mechanical behavior. Besides, some simulation studies [24][25][26] confirmed that the orientation of the grains do have an impact on the thermal stress distribution based on the assumption of linear elasticity, without considering the plastic deformation of grains, especially the evolution of the microstructure.…”

Section: Introductionmentioning

confidence: 98%

Protrusion Study of Through-Silicon-Vias in Dual Anneal-CMP Processes for 3D Integration

Liu,

Wang

et al. 2024

Preprint

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Through-Silicon Via (TSV) technology is extensively utilized to achieve dense 3D integration. It facilitates the vertical electrical interconnection of different layers of integrated circuits, enabling the creation of sophisticated and space-efficient systems that incorporate a variety of functionalities. This work reports a TSV fabrication with dual anneal-CMP processes to explore the influence of annealing and CMP processes on the evolution of TSV-Cu microstructures and the protrusion. The results show that the dual CMP process can effectively reduce protrusion during high temperatures. The Cu protrusion height increased with the elevation of both the annealing temperature and duration. And it shows good consistency under the high temperature annealing, while shows random phenomenon under 250oC annealing. The phase field model related to TSV grain size was established to quantitatively explore the grain morphology distribution and the thermal mechanical behavior. The results show that the strain in Cu is non-uniform, and the degree of plastic deformation for each grain is closely related to its distribution. The quantity of grains within the TSV is the most important factor affecting the protrusion. As the average grain size expands, the prominence of Cu grain protrusions within TSV intensifies, and the anisotropy of the Cu grains becomes more pronounced. The thermal-mechanical behavior strongly depends on the grain orientation near the top of the TSV, which will lead to some TSV protrusion irregularities. This work may open more opportunities to design high performance TSV preparation methods from the viewpoint of dual CMP process.

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“…The results from a linear elastic mechanical model clearly demonstrate that the stress distribution is rather heterogeneous inside the TSV filler, considering the anisotropy of the elastic compliance tensor of copper. Depending on the texture, morphology and distribution of the copper grains, stress concentrations may occur at the grain boundaries (GBs) [14]. Elastoplastic models have also been conducted directly on copper grain structures with the aim of explaining the formation of Cu extrusion [15].…”

Section: Introductionmentioning

confidence: 99%

An atomistic study of copper extrusion in through-silicon-via using phase field crystal models

Huang

Liu

Conway

et al. 2016

2016 6th Electronic System-Integration Technology Conference (ESTC)

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Three-dimensional system integration using Cu through-silicon-via (TSV) technology enables vertical interconnection of stacked dies. However, the large statistical distribution of plastic Cu extrusion, also known as Cu pumping, presents a serious reliability concern. Traditional finite element method (FEM) based thermomechanical modeling that neglects microstructure has been extensively attempted in order to identify the root cause of the extrusion, which yet remains unknown. This study utilizes recently developed phase field crystal (PFC) models, which resolve systems on atomic length scales and diffusive timescales, to capture the creation, destruction, and interaction of defects in polycrystalline Cu TSV structures and thereby elucidate the atomistic mechanisms of the Cu extrusion. The governing kinetic equation of the PFC model is first solved using FEM to generate Cu grains with an atomic resolution in TSVs by referring to experimental EBSD images. A shearing term is then added to the governing equation to simulate TSV deformation under shear strain. The solidification process at the atomistic scale is simulated to prepare polycrystalline TSV samples. Rotation and coalescence of grains with low mis-orientations are observed in solidification. The application of shear strain to the polycrystalline TSVs reveals the movement of defects at the atomistic scale. The defects diffuse through grain boundaries and aggregate at the edges of TSVs, where the defects become immobile. The process of rotation and coalescence of grains is found to be accelerated under the shear strain. The simulation results also suggest that the geometry of the TSVs is an important factor controlling the behavior of defect diffusion and microstructures in TSVs, and thus the mechanical behavior of TSVs.

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Effects of the microstructure of copper through-silicon vias on their thermally induced linear elastic mechanical behavior

Cited by 16 publications

References 24 publications

Effect of Cu–Sn intermetallic compound reactions on the Kirkendall void growth characteristics in Cu/Sn/Cu microbumps

Effect of Cu–Sn intermetallic compound reactions on the Kirkendall void growth characteristics in Cu/Sn/Cu microbumps

Protrusion Study of Through-Silicon-Vias in Dual Anneal-CMP Processes for 3D Integration

An atomistic study of copper extrusion in through-silicon-via using phase field crystal models

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