Effect of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al/sub 2/O/sub 3/ gate dielectric

Abstract

A1203 (EOT=22.7A) gate dielectric layer formed by Atomic Layer Deposition (ALD) process have been characterized for sub-100m CMOS devices. The gate leakage current was 3 orders of magnitude lower than that of Si02 and the histeresis of C-V curve was not obselved. However, the negative fixed charge induced the flat band voltage (Vfb) shift and degraded the channel mobility of MOS transistor. The Vfb shift was reduced and channel mobility was improved by applying P+ gate by BF2 implantation. It is suggested that the phosphorous diffused from gate polysilicon has a role of network modifier in A1203 film and formation of the A1-0-dangling bond which may be ascribed to negative fixed charge.

Surface preparation and post thermal treatment effects on interface properties of thin Al2O3 films deposited by ALD

“…Further reduction of D it down to $1.2 Â 10 11 eV À1 cm À2 was noted when a subsequent, supplementary annealing in nitrogen or forming gas (N 2 /H 2 5%) at 425°C for 30 min was effected. The value is in agreement with literature (1-3 Â 10 11 eV À1 cm À2 ) [14,15,18,19]. As above the first-step annealing, longer (60 min) forming gas duration increased D it , which means annealing condition is critically optimized for reduce interface state density.…”

The structural and interfacial properties of HfO2/Si by the plasma oxidation of sputtered metallic Hf thin films

“…Therefore, to keep device areas small and prevent leakage current while maintaining the same gate capacitance equivalent to a thinner (B1.0 nm and below) SiO 2 layer, a physically thicker film and a material with a significantly higher dielectric constant (high-k) is required. By far Y 2 O 3 , Ta 2 O 5 , Al 2 O 3 , TiO 2 and SrTiO 3 (STO) have received considerable attention as the gate oxide thickness of MOS devices are being scaled down [1][2][3][4][5].…”

The effect of oxygen source on atomic layer deposited Al2O3 as blocking oxide in metal/aluminum oxide/nitride/oxide/silicon memory capacitors

“…A post metallization annealing was performed at 350°C for 20 min in nitrogen ambient. Transmission electron microscopy (TEM) Thin Solid Films 533 (2013) [5][6][7][8] was employed for the investigation of the gate stack thickness characteristics. TEM studies were performed on a Philips CM 20 microscope with high resolution capabilities, operating at 200 kV, equipped with an energy dispersive X-ray spectrometer (EDS).…”

“…High-permittivity (high-k) dielectric materials, such as Al 2 O 3 [5,6], have been proposed as substituent for one or more of the dielectric layers of the oxide-nitride-oxide stack; a substitution of which improves significantly the properties of the memory cell. Al 2 O 3 has excellent chemical and thermal stability [7,8], and a wide band-gap, combined with a moderate permittivity. In addition, Al 2 O 3 is characterized by a high defect density [9][10][11][12] leading to enhanced trap assisted conduction [13,14] with obvious concerns about the reliability of the memory stack.…”