Effect of Annealing Temperature on Minimum Domain Size of Ferroelectric Hafnia

Yun, Seokjung; Kim, Hoon; Seo, Myungsoo; Kang, Minho; Kim, Sang Woo; Cho, Seongwoo; Park, Min Hyuk; Jeon, Sanghun; Choi, Yang‐Kyu; Hong, Seungbum

doi:10.48550/arxiv.2301.05374

Cited by 3 publications

(6 citation statements)

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“…It is worth noting that the voltage applied in the PFM is larger than that applied in the P-E loop measurements, which is consistent with other works. , In the PFM test, since the conducting probe is used as the top electrode, the electric field distribution is completely different from that in the P-E loop measurements . In addition, the interfacial contact voltage drop between the tip of the conductive probe and the surface of the HZO film is inevitable. , These two main factors cause the voltage in the PFM test to be much larger than that in the P-E loop measurements.…”

Section: Resultssupporting

confidence: 85%

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Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Wang

Wen

et al. 2023

ACS Appl. Mater. Interfaces

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It is commonly believed that the impact of the top electrodes on the ferroelectricity of hafnium-based thin films is due to strain engineering. However, several anomalies have occurred that put existing theories in doubt. This work carries out a detailed study of this issue using both theoretical and experimental approaches. The 10 nm Hf0.5Zr0.5O2 (HZO) films are prepared by atomic layer deposition, and three different top capping electrodes (W/MO/ITO) are deposited by physical vapor deposition. The electrical testing finds that the strain does not completely control the ferroelectricity of the devices. The results of further piezoelectric force microscopy characterization exclude the potential interference of the top capping electrodes and interface for electrical testing. In addition, through atomic force microscopy characterization and statistical analysis, a strong correlation between the grain size of the top electrode and the grain size of the HZO film has been found, suggesting that the grain size of the top electrode can induce the formation of the grain size in HZO thin films. Finally, the first-principles calculation is carried out to understand the impact of the strain and grain size on the ferroelectric properties of HZO films. The results show that the strain is the dominant factor for ferroelectricity when the grain size is large (>10 nm). However, when the grain size becomes thinner (<10 nm), the regulation effect of grain sizes increases significantly, which could bring a series of benefits for device scaling, such as device-to-device variations, film uniformity, and domain switch consistency. This work not only completes the understanding of ferroelectricity through top electrode modulation but also provides strong support for the precise regulation of ferroelectricity of nanoscale devices and ultrathin HZO ferroelectric films.

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Section: Resultssupporting

confidence: 85%

“…40 In addition, the interfacial contact voltage drop between the tip of the conductive probe and the surface of the HZO film is inevitable. 41,42 These two main factors cause the voltage in the PFM test to be much larger than that in the P-E loop measurements.…”

Section: Resultsmentioning

confidence: 99%

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Wang

Wen

et al. 2023

ACS Appl. Mater. Interfaces

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“…Using the Park Systems, NX-10 atomic force microscopy (AFM), the actual distribution of grain size in the HZO film (note that the scanned area of the HZO film was 500 nm × 500 nm) was investigated to consider the variation in rising time [8,13,25]. Using the XEI and Gwyddion software [26], the AFM images were analyzed to determine the grain size (see figures 3(a)-(c)).…”

Section: Resultsmentioning

confidence: 99%

Grain-size adjustment in Hf_0.5Zr_0.5O₂ ferroelectric film to improve the switching time in Hf_0.5Zr_0.5O₂-based ferroelectric capacitor

Yoon,

Choi,

Shin

2024

Nanotechnology

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By adjusting the rising time in annealing ferroelectric HfO2-based films, the grain size of the film can be controlled. In this study, we found that increasing the rising time from 10 s to 30 s at an annealing temperature of 700 °C in N2 atmosphere resulted in improved ferroelectric switching speed. This is because the larger grain size reduces the internal resistance components, such as the grain bulk resistance and grain boundary resistance, of the HZO film. This in turn lowers the overall equivalent resistance. By minimizing the RC time constants, increasing the grain size plays a key role in improving the polarization switching speed of ferroelectric films.

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“…In this work, a Zr doped HfO 2 (Hf 0.5 Zr 0.5 O 2 also referred as HZO) film is considered as the FE material due to its orthorhombic phase and compatibility with the CMOS process [6,10,50]. A single domain switching in the FE is considered, which essentially implies that the lateral dimensions (L G ) of the MFMIS NCFET are comparable to the domain size in the FE layer [26,51,52]. This has been experimentally reported in HZO film [51].…”

Section: Resultsmentioning

confidence: 99%

“…However, the leakage through the FE layer can be curtailed by minimizing traps in the FE layer [22,23], (ii) the IG in an MFMIS NCFET can cause the formation of oppositely oriented domains, which can disable NC phenomena [24,25]. Thus, for stabilizing the NC in an MFMIS structure, all lateral device dimensions should be kept comparable to the domain size in the FE layer (sub-100 nm) to prevent oppositely oriented domain formation [26], and (iii) charge trapping in the IG (through Fowler-Nordheim tunneling due to a high vertical electric field [27]) can also adversely impact NC properties as well as the threshold voltage of the device [28]. However, for ULP applications, the charge trapping in the IG is not expected to be significant due to a lower supply voltage (<0.5 V) [27].…”

Section: Introductionmentioning

confidence: 99%

Analytical modeling of architecture dependent atypical scaling trends in metal–Hf_0.5Zr_0.5O₂–metal-SiO₂–Si negative capacitance transistors

Semwal

Kranti

2023

Semicond. Sci. Technol.

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In order to better understand the possible improvement through the incorporation of a ferroelectric layer in the gate stack of the nanoscale transistor, this work develops analytical expressions to assess the scalability of cylindrical (CYL) nanowire and planar double gate (DG) metal-ferroelectric-metal-insulator-semiconductor (MFMIS) negative capacitance (NC) transistors. While predicting sub-60 mV/decade subthreshold swing and negative drain induced barrier lowering (DIBL), results indicate that at lower ferroelectric thickness, the performance of NCFET is primarily governed by the electrostatic integrity of baseline transistor i.e. CYL architecture outperforms planar DG NCFET. However, for relatively thicker TFE, the performance of MFMIS NCFET is strongly governed by the ferroelectric coupling, which indicates comparable performance of DG and CYL MFMIS NCFETs. The formalism, while predicting atypical trends, showcases a pragmatic design criterion for achieving sub-60 mV/dec subthreshold swing and DIBL-free characteristics in MFMIS NC transistor.

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Effect of Annealing Temperature on Minimum Domain Size of Ferroelectric Hafnia

Cited by 3 publications

References 0 publications

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Grain-size adjustment in Hf_0.5Zr_0.5O₂ ferroelectric film to improve the switching time in Hf_0.5Zr_0.5O₂-based ferroelectric capacitor

Analytical modeling of architecture dependent atypical scaling trends in metal–Hf_0.5Zr_0.5O₂–metal-SiO₂–Si negative capacitance transistors

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Effect of Annealing Temperature on Minimum Domain Size of Ferroelectric Hafnia

Cited by 3 publications

References 0 publications

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf0.5Zr0.5O2 Thin Films

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf0.5Zr0.5O2 Thin Films

Grain-size adjustment in Hf0.5Zr0.5O2 ferroelectric film to improve the switching time in Hf0.5Zr0.5O2-based ferroelectric capacitor

Analytical modeling of architecture dependent atypical scaling trends in metal–Hf0.5Zr0.5O2–metal-SiO2–Si negative capacitance transistors

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Product

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Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Understanding the Effect of Top Electrode on Ferroelectricity in Atomic Layer Deposited Hf_0.5Zr_0.5O₂ Thin Films

Grain-size adjustment in Hf_0.5Zr_0.5O₂ ferroelectric film to improve the switching time in Hf_0.5Zr_0.5O₂-based ferroelectric capacitor

Analytical modeling of architecture dependent atypical scaling trends in metal–Hf_0.5Zr_0.5O₂–metal-SiO₂–Si negative capacitance transistors