Dynamic thermal management via architectural adaptation

Abstract

Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques continuously monitor the on-chip processor temperature. Appropriate mechanisms (e.g., dynamic voltage or frequency scaling (DVFS), clock gating, fetch gating, etc.) are engaged to lower the temperature if it exceeds a threshold. However, all these mechanisms incur significant performance penalty. We argue that runtime adaptation of micro-architectural parameters, such as instruction window size and issue width, is a more effective mechanism for DTM. If the architectural parameters can be tailored to track the available instruction-level parallelism of the program, the temperature is reduced with minimal performance degradation. Moreover, synergistically combining architectural adaptation with DVFS and fetch gating can achieve the best performance under thermal constraints. The key difficulty in using multiple mechanisms is to select the optimal configuration at runtime for time varying workloads. We present a novel software-level thermal management framework that searches through the configuration space at regular intervals to find the best performing design point that is thermally safe. The central components of our framework are (1) a neural-network based classifier that filters the thermally unsafe configurations, (2) a fast performance prediction model for any configuration, and (3) an efficient configuration space search algorithm. Experimental results indicate that our adaptive scheme achieves 59% reduction in performance overhead compared to DVFS and 39% reduction in overhead compared to DVFS combined with fetch gating.

Reinforcement Learning-Based Inter- and Intra-Application Thermal Optimization for Lifetime Improvement of Multicore Systems

“…A reinforcementlearning based adaptive technique is proposed in [3] to optimize temperature by controlling task mapping based on the temperature of the current iteration. A neural network based adaptive technique is proposed in [9] to reduce peak temperature. Both these techniques rely on the HotSpot tool for temperature prediction.…”

Lifetime Reliability Aware Architectural Adaptation

“…Our performance prediction model is inspired by the interval based models proposed in [8], [9]. The interval based model suggests that there exists a sustained background performance level that is punctuated by transient miss-events such as branch mis-prediction and cache misses.…”

A hybrid local-global approach for multi-core thermal management

“…We show that employing a combination of simple local schemes and global DVFS results in simple and effective thermal management solutions. We have recently proposed runtime reconfigurable architectural parameters (instruction window size and issue width) as an effective mechanism for single-core DTM [11]. Applying multiple knobs simultaneously for thermal management of multi-cores is more challenging because (a) all the cores are constrained to use identical operating frequency preempting the possibility of choosing per-core parameters independently, and (b) the configuration and workload of a core has significant impact on the temperature of the neighboring cores due to lateral coupling (lateral heat transfer among adjacent cores).…”

“…We need a different set of knobs to control the performance and power per core independently. We recently proposed non-DVFS techniques such as fetch gating and architecture adaptations (runtime reconfiguration of instruction window size and issue width) for dynamic thermal management of single cores [11]. These techniques are easy to implement at individual core level as they are largely localized and do not create complexity in terms of communication among the cores and multiple voltage islands.…”