Dynamic Reconfigurability in Embedded System Design

Abstract

Nowadays, dynamic reconfigurable embedded systems are widely used, since they have the capability to modify their functionalities, adding or removing components and modify interconnections among them. The basic idea behind these systems is to have the system autonomously modify its functionalities according to the application's changes. This paper describes the area of reconfigurable embedded systems presenting both architectural and methodological aspects trying to point out common features and needs. After a brief introduction, an overview of the models, of the reconfigurable architectures, and of the design methodologies will be presented.

Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign

“…The proposed design flow [42,43] consists mainly of three phases, as shown in Figure 3: • High Level Reconfiguration, HLR…”

A design flow tailored for self dynamic reconfigurable architecture

“…The software side of the desired solution can be developed either as a standalone application or with the support of an OS such as Linux, enhanced with an additional support for reconfigurable hardware modules [7]. An initial flow, described in [32], has been extended and improved to define the framework. This complete framework allows to easily implementing FPGA system specifications using high-level front-ends such as Simulink and exploiting the capabilities of dynamic partial reconfiguration.…”

FPGA Technology and Dynamic Reconfiguration

“…The issue that is avoiding a wider diffusion of such architectures is certainly the lack of a complete software toolchain capable of taking into account partial dynamic reconfiguration in a sound manner, even if now novel methodologies have been proposed (Rana et al, 2007).…”

“…The framework proposed in this work is part of a much larger one described in (Rana et al, 2007), the Earendil framework, developed in our lab at Politecnico di Milano.…”