Dynamic bias temperature instability of p-channel polycrystalline silicon thin-film transistors

Two-Stage Degradation of p-Type Polycrystalline Silicon Thin-Film Transistors Under Dynamic Positive Bias Temperature Stress

“…The stress was carried out at a temperature of 60°C with V gp = 35 V, t p = 20 μs, t r = t f = 1 μs, and t gp = 0, in which t gp is set to be 0 to avoid any possible apparent dc PBTI effects. Different from the monotonic increase of I ON reported in [21]- [23], the stressed TFT exhibits a two-stage degradation behavior. Initially, I ON increases slightly with stress time.…”

“…Different from the monotonic increase of ON-state current (I ON ) observed in [21]- [23], a two-stage degradation behavior is observed for the first time. The first-stage degradation is due to the channel length shortening effect induced by electrons injection.…”

“…2, the change of threshold voltage (V th ) is negligible, so I ON increase in the first stage is due to the increase in the transconductance (g m ), which can be caused by the electrons trapping-induced channel length shortening effect [21]- [23]. One clear evidence to support this point view is the suppression of the OFF-state leakage current (I OFF ) at V d = −5 V after dynamic stress.…”

“…In TFT-based circuits, positive bias temperature instability (PBTI) of p-type poly-Si TFTs is also an important concern. Among limited studies on PBTI of p-type TFTs [20]- [23], degradation mechanism under static PBTI stress [20] has been studied.…”

Instability of p-channel poly-Si thin-film transistors under dynamic negative bias temperature stress

“…Some reported that the degradation was similar as that in DC NBT stress [6]. Others reported little degradation was observed under dynamic NBT stress [7]. In this study, degradation of p-channel poly-Si TFTs under dynamic NBT stress is investigated.…”