Dual-Mode Multiple-Band Digital Controller for High-Frequency DC–DC Converter

Abstract

An integrated digital controller design for dc-dc converter is proposed in this paper. The proposal presents a multipleband dual-stage (MBDS) delay line A/D converter (ADC) for wide dynamic range of operation with reduced ripple, chip area, and power consumption. This proposal also introduces a novel folding logic for digital error calculation and dual-mode error control PID for improving transient response. A complete closed-loop experimental prototype is demonstrated on a field-programmable-gatearray-based setup. The feasibility and functionality of the proposed digital controller is verified with a closed-loop synchronous buck converter prototype that switches at 1 MHz and regulates over a wide output voltage range of 1.6-3.3 V. The proposed MBDS delay line ADC is fabricated with discrete logic gates and flip-flops. The integrated digital controller is also implemented using standard cell-based design methodology in 0.5-µm CMOS technology. The design reduces 33% on-chip area compared to an equivalent of 64 tap delay line ADC. The complete digital controller chip takes less than 0.7 mm 2 of silicon area and consumes an average current of 92 µA at 1-MHz switching frequency. The voltage-mode digital loop achieves tracking time of less than 10 µs for 1-V step change of the reference voltage and settling time of 20 µs. Postlayout simulation and experimental results are demonstrated.Index Terms-Analog-to-digital converter, dc-dc converter, delay line ADC, dynamic voltage scaling, piecewise linear, wide dynamic range.

Digital controller based on delta operator for high‐frequency DC–DC switching converters

“…The transfer function of the conventional PID controller in the sdomain shown in (1) is still used as an example herein. The zdomain discrete transfer function of the D-PID in (3) is transferred to the δ-domain using the δ-domain definition provided in (9), which can be expressed using (11), the delta operator D-PID can be expressed by (12)…”

“…The increase in the switching frequency of a DC-DC switching converter not only improves its transient response features with load variation, but also significantly reduces the sizes and weights of the passive filtering components, including inductors and capacitors. These power supply module improvements are particularly beneficial for portable and mobile consumer electronics [7][8][9][10][11]. Consequently, high-frequency digitally controlled (HFD) DC-DC switching converters attract considerable attention from both the academia and industry [12][13][14][15].…”

“…The switching frequencies of analogue-control DC-DC switching converters have exceeded several tens of megahertz [7][8][9][10]. However, the switching frequencies of digitally controlled DC-DC switching converters have only increased from hundreds of kilohertz [1,11,12] to several megahertz [13][14][15], because of two special issues that exist at high frequencies: maintaining the stability and the accuracy of the feedback control system and reducing the hardware cost.…”

A power and area efficient 65 nm CMOS delay line ADC for on-chip voltage sensing

“…Area scales with fabrication technology for delay line ADCs, and with sample and hold capacitors delay line ADCs' sampling rate can reach as high as 1 GHz [3] [5]. Power can be further reduced by keeping the sampling frequency below 1 MHz while maintaining the resolution with the use of dual-band decoding [6]. However, its area cannot be kept lower than 0.28 mm 2 due to digital error correction circuit associated with dual-band decoding in [6].…”

“…Power can be further reduced by keeping the sampling frequency below 1 MHz while maintaining the resolution with the use of dual-band decoding [6]. However, its area cannot be kept lower than 0.28 mm 2 due to digital error correction circuit associated with dual-band decoding in [6]. A 0.18 μm low power delay line ADC, occupying only 0.04 mm 2 , with programmable resolution has been reported with the elimination of back-end error correction circuit by a reference line [4].…”