Drain-induced Schottky barrier source-side hot carriers and its application to program local bits of nanowire charge-trapping memories

Chang, Wei; Shih, Chun‐Hsing; Luo, Yan-Xiang; Wu, Wen−Fa; Lien, Chenhsin

doi:10.7567/jjap.53.094001

Cited by 3 publications

(4 citation statements)

References 30 publications

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“…The Fermi level unpinning enables easy modulation of the Schottky barrier, a feature that can be exploited to tune Gr/Si devices to match specific performance requests 11,56 . Deviations from the Schottky-Mott prediction are mainly due to image force lowering 57 or hot electrons barrier lowering [58][59] .…”

Section: Fig 3cmentioning

confidence: 84%

“…Another important effect which can lead to a stronger V-dependence of the reverse current is the Schottky barrier lowering caused by hot electrons [58][59] that might originate even a quadratic ΔΦ B (V). In this scenario, the gating effect induces abrupt band bending around the Schottky barrier that increases the lateral field, which in turn produces significant enhancement of hot carriers.…”

Section: 𝑘𝑇mentioning

confidence: 99%

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Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device

et al. 2016

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We demonstrate tunable Schottky barrier height and record photo-responsivity in a new-concept device made of a single-layer CVD graphene transferred onto a matrix of nanotips patterned on ntype Si wafer. The original layout, where nano-sized graphene/Si heterojunctions alternate to graphene areas exposed to the electric field of the Si substrate, which acts both as diode cathode and transistor gate, results in a two-terminal barristor with single-bias control of the Schottky barrier. The nanotip patterning favors light absorption, and the enhancement of the electric field at the tip apex improves photo-charge separation and enables internal gain by impact ionization. 2These features render the device a photodetector with responsivity (3 / for white LED light at 3 2 ⁄ intensity) almost an order of magnitude higher than commercial photodiodes. We extensively characterize the voltage and the temperature dependence of the device parameters and prove that the multi-junction approach does not add extra-inhomogeneity to the Schottky barrier height distribution.This work represents a significant advance in the realization of graphene/Si Schottky devices for optoelectronic applications.

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Section: Fig 3cmentioning

confidence: 84%

Section: 𝑘𝑇mentioning

confidence: 99%

Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device

et al. 2016

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“…To accomplish this the memory retention time needs to be significantly increased. This could be done both using nonvolatile NW based designs [49][50][51] or more traditional Si charge trapping devices that can be connected to the NWs [52,53]. As the memory is only included in the artificial neurons, this construction potentially using a standard chip platform is possible.…”

Section: Discussionmentioning

confidence: 99%

Artificial nanophotonic neuron with internal memory for biologically inspired and reservoir network computing

Winge,

Borgström,

Lind

et al. 2023

Neuromorph. Comput. Eng.

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Neurons with internal memory have been proposed for biological and bio-inspired neural networks, adding important functionality. We introduce an internal time-limited charge-based memory into a III–V nanowire (NW) based optoelectronic neural node circuit designed for handling optical signals in a neural network. The new circuit can receive inhibiting and exciting light signals, store them, perform a non-linear evaluation, and emit a light signal. Using experimental values from the performance of individual III–V NWs we create a realistic computational model of the complete artificial neural node circuit. We then create a flexible neural network simulation that uses these circuits as neuronal nodes and light for communication between the nodes. This model can simulate combinations of nodes with different hardware derived memory properties and variable interconnects. Using the full model, we simulate the hardware implementation for two types of neural networks. First, we show that intentional variations in the memory decay time of the nodes can significantly improve the performance of a reservoir network. Second, we simulate the implementation in an anatomically constrained functioning model of the central complex network of the insect brain and find that it resolves an important functionality of the network even with significant variations in the node performance. Our work demonstrates the advantages of an internal memory in a concrete, nanophotonic neural node. The use of variable memory time constants in neural nodes is a general hardware derived feature and could be used in a broad range of implementations.

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“…Kim et al 8 believed that the image force also can lower SBH, which will result in some unreasonable conclusions shown in the following content. Chang et al 25 experimentally reported that the SBH lowering is caused by hot electrons for Schottky barrier nanowire charge-trapping silicon–oxide–nitride–oxide–silicon devices. It implies that the physical origin of the SBH lowering in field-effect transistors caused by hot electrons should carefully be considered.…”

mentioning

confidence: 99%

Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors

Mao

Ning

Huo

et al. 2015

Sci Rep

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A new physical model of the gate controlled Schottky barrier height (SBH) lowering in top-gated graphene field-effect transistors (GFETs) under saturation bias condition is proposed based on the energy conservation equation with the balance assumption. The theoretical prediction of the SBH lowering agrees well with the experimental data reported in literatures. The reduction of the SBH increases with the increasing of gate voltage and relative dielectric constant of the gate oxide, while it decreases with the increasing of oxide thickness, channel length and acceptor density. The magnitude of the reduction is slightly enhanced under high drain voltage. Moreover, it is found that the gate oxide materials with large relative dielectric constant (>20) have a significant effect on the gate controlled SBH lowering, implying that the energy relaxation of channel electrons should be taken into account for modeling SBH in GFETs.

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Drain-induced Schottky barrier source-side hot carriers and its application to program local bits of nanowire charge-trapping memories

Cited by 3 publications

References 30 publications

Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device

Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device

Artificial nanophotonic neuron with internal memory for biologically inspired and reservoir network computing

Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors

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