We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage, pressure, temperature or light intensity. Our measurements reveal a step-like behavior of the hysteresis around room temperature, which we explain as water-facilitated charge trapping at the MoS2/SiO2 interface. We conclude that intrinsic defects in MoS2, such as S vacancies, which result in effective positive charge trapping, play an important role, besides H2O and O2 adsorbates on the unpassivated device surface. We show that the bistability associated to the hysteresis can be exploited in memory devices.

We study electrical transport properties in exfoliated molybdenum disulfide (MoS) back-gated field effect transistors at low drain bias and under different illumination intensities. It is found that photoconductive and photogating effect as well as space charge limited conduction can simultaneously occur. We point out that the photoconductivity increases logarithmically with the light intensity and can persist with a decay time longer than 10 s, due to photo-charge trapping at the MoS/SiO interface and in MoS defects. The transfer characteristics present hysteresis that is enhanced by illumination. At low drain bias, the devices feature low contact resistance of [Formula: see text] ON current as high as [Formula: see text] 10 ON-OFF ratio, mobility of ∼1 cm V s and photoresponsivity [Formula: see text].

We report on the temperature dependence of the quasiparticle density of states in the simple binary compound MgB(2) directly measured using scanning tunneling microscope (STM). To achieve high quality tunneling conditions, a small crystal of MgB(2) is used as a tip in the STM experiment. The "sample" is chosen to be a 2H- NbSe(2) single crystal presenting an atomically flat surface. At low temperature the tunneling conductance spectra show a gap at the Fermi energy followed by two well-pronounced conductance peaks on each side. They appear at voltages V(S) approximately +/-3.8 mV and V(L) approximately +/-7.8 mV. With rising temperature both peaks disappear at the T(C) of the bulk MgB(2), a behavior consistent with the model of two-gap superconductivity. The possibility of a particular proximity effect is also discussed.

The extremely high carrier mobility and the unique band structure, make graphene very useful for field-effect transistor applications. According to several works, the primary limitation to graphene based transistor performance is not related to the material quality, but to extrinsic factors that affect the electronic transport properties. One of the most important parasitic element is the contact resistance appearing between graphene and the metal electrodes functioning as the source and the drain. Ohmic contacts to graphene, with low contact resistances, are necessary for injection and extraction of majority charge carriers to prevent transistor parameter fluctuations caused by variations of the contact resistance. The International Technology Roadmap for Semiconductors, toward integration and down-scaling of graphene electronic devices, identifies as a challenge the development of a CMOS compatible process that enables reproducible formation of low contact resistance. However, the contact resistance is still not well understood despite it is a crucial barrier towards further improvements. In this paper, we review the experimental and theoretical activity that in the last decade has been focusing on the reduction of the contact resistance in graphene transistors.We will summarize the specific properties of graphene-metal contacts with particular attention to the nature of metals, impact of fabrication process, Fermi level pinning, interface modifications induced through surface processes, charge transport mechanism, and edge contact formation.

We demonstrate tunable Schottky barrier height and record photo-responsivity in a new-concept device made of a single-layer CVD graphene transferred onto a matrix of nanotips patterned on ntype Si wafer. The original layout, where nano-sized graphene/Si heterojunctions alternate to graphene areas exposed to the electric field of the Si substrate, which acts both as diode cathode and transistor gate, results in a two-terminal barristor with single-bias control of the Schottky barrier. The nanotip patterning favors light absorption, and the enhancement of the electric field at the tip apex improves photo-charge separation and enables internal gain by impact ionization. 2These features render the device a photodetector with responsivity (3 / for white LED light at 3 2 ⁄ intensity) almost an order of magnitude higher than commercial photodiodes. We extensively characterize the voltage and the temperature dependence of the device parameters and prove that the multi-junction approach does not add extra-inhomogeneity to the Schottky barrier height distribution.This work represents a significant advance in the realization of graphene/Si Schottky devices for optoelectronic applications.