Ditch and elevated organic thin film transistor‐based improved common source voltage amplifier: Frequency response characteristics and analytical modeling

Mittal, Poornima

doi:10.1002/jsid.1007

Cited by 8 publications

(4 citation statements)

References 31 publications

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“…12. show that the delay in propagation gets widened in the bootstrapped organic all-p inverter, because of the feeble pull down OTFT which may be raised on pull down organic transistor with a considerably higher aspect ratio [24]. Fig.…”

Section: Performance Upgradation Using Bootstrapping Techniquementioning

confidence: 97%

All-p ZVLL Inverter with Bootstrapping based on a ditch OTFT

Gupta

Mittal

Juneja

2023

Preprint

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This research manifests the characteristics both static and dynamic, of a bootstrapped all-p ZVLL inverter using a single gate BGBC organic transistor with extra p + doping near the source and drain electrodes and a 40 nm ditch incorporated in the pentacene organic semiconductor layer. Several topologies of the inverter were experimented with and compared in terms of their performance pre and post the application of the bootstrap technique. Bootstrapping proved to be a befitting choice for obtaining the maximum efficient results in terms of noise margin, delay in propagation, transient time, and gain. Upon comparison it was observed that the bootstrapped inverter showed considerably better voltage transfer characteristics in terms of high and low noise margins. A surge of 18.46% and 22.25% is noticed in noise margins of the bootstrapped device as compared to the device without bootstrapping. Also, the dynamic response of DLL and ZVLL topology devices exhibit a hike in the voltage swing by 24% and 13% respectively. Furthermore, contrast to DLL, the average delay of the ZVLL inverter decreases by 54.5 µs after the application of bootstrapping technique, whereas the value of average propagation delay decreases by a mere 10 µs. Pertaining to the results attained, ZVLL proves to be a more responsive circuit, leading to an inverter that is apparently more robust, better noise margins, attenuated power leakage and improved sensitivity.

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Section: Performance Upgradation Using Bootstrapping Techniquementioning

confidence: 97%

All-p ZVLL Inverter with Bootstrapping based on a ditch OTFT

Gupta

Mittal

Juneja

2023

Preprint

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“…TGF plays a pivotal role in determining how the current can be effectively utilized to attain a desired transconductance. The g m and TGF are expressed as [17,35] Generally, analog circuit devices are frequently operated in the saturation region. While I D typically remains unaffected by V DS in the saturation region, the impact of V DS on channel electrostatics introduces variations in I D , attributed to short-channel behavior.…”

Section: Impact Of Channel Length Scaling On Analog/rf Parametersmentioning

confidence: 99%

Investigating the effect of scaling and temperature on the performance of improved junctionless nanowire FET through simulation analysis

Bharti,

Mittal

2024

Phys. Scr.

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An Improved Junctionless Nanowire Field Effect Transistor (I-JL-NWFET) device is proposed in this paper to address the limitations of conventional JL-NWFET. This research paper initially, comprehensively analyzes the impact of channel length (L) and channel thickness (t si ) scaling on the electrical, analog/RF, and linearity performance of I-JL-NWFET and JL-NWFET. The results suggest that the specific design features in I-JL-NWFET contribute to a more robust and less sensitive response to variations in scaling compared to its counterpart, JL-NWFET. Furthermore, an exploration into the impact of temperature on the electrical, analog/RF, and linearity performance is also conducted for both I-JL-NWFET and JL-NWFET. The electrical performance of I-JL-NWFET showcases a significantly reduced temperature sensitivity in parameters like drain current (I D ), Subthreshold Slope (SS) and Drain Induced Barrier Lowering (DIBL) compared to JL-NWFET. Subsequently, analyzing the analog/RF performance in the context of parameters such as transconductance (g m ), Transconductance Gain Factor (TGF), output conductance (g d ), early voltage (V EA ), total gate capacitance (C GG ), and cut-off frequency (f T ) under temperature variation, a lower degree of variability in I-JL-NWFET is observed compared to JL-NWFET. Furthermore, the linearity performance of I-JL-NWFET, assessed through parameters such as second and third-order transconductance (g m2 , g m3 ), second and third-order input voltage intercept points (VIP2, VIP3), and third-order intermodulation distortion (IIP3 and IMD3) is improved at the higher temperature than that of JL-NWFET.

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“…Besides, there is a non-linear upgradation of contact resistance with upgrading thickness of the organic film which is unlikely for the structures with contacts at the top [13]. Additionally, due to assemblage of gate electrode metal, the structures encounter certain flaws, making BGBC a more endorsed choice [11].…”

Section: Structural Analysis Of Otftmentioning

confidence: 99%

“…This paper in the first section demonstrates the prologue to the organic TFT and organic inverters. The second discusses the various possible structural analysis of OTFT alongside exhibiting a single gate-bottom gate bottom contact (SG BGBC) device structure with and without the incorporation of ditch and p+ doping in the organic semiconductor layer (OSC) [11]. Thereafter, section 3 elaborates on employing the mentioned device for the construction of an all-p type OTFT organic inverter Moreover it also attracts the attention towards the inverter being evaluated under Diode-Load Logic (DLL) and Zero-V gs -Load Logic (ZVLL) configurations for the calculation and derivation of the static and dynamic characteristics.…”

Section: Introductionmentioning

confidence: 99%

Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

Gupta,

Mittal,

Juneja

2023

Phys. Scr.

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This paper demonstrates the static and dynamic characteristics of all-p organic inverter employing a bottom gate bottom contact organic thin film transistor with a ditch incorporated into the OSC and additional p+ doping done to its S/D nearing area. Various configurations of OTFT have been experimented with and it is found that as compared to an OTFT without extra p+ doping, the devices having additional doping show better responses. Where, for SG OTFT, ID is derived to be 18 μs, yet the one with extra doping illustrates a swooping 16.67% increased output current of 21 μs. To enhance the performance of the device further, a ditch of 30 nm, embedded 10 nm into the OSC is incorporated, further augmenting the performance of the device by 55.5% as compared to the conventional BGBC. Besides, the proposed inverter presents a considerably elevated performance in terms of robustness and low and high noise margins. This paper further compares the inverter using Diode Load Logic and Zero Vgs Load Logic topologies, wherein it was found that DLL shows an exceptional 211% less propagation delay τ p of 27 μs, as compared to 84 μs delay experienced by ZVLL. But comparing the two topologies in terms of the static response, ZVLL are way better and preferred over the counterparts since ZVLL configuration displays 20.5% augmented Noise Margin, improved gain, and overall robustness. Owing to the performance parameters achieved, such organic inverters may be incorporated into integrated circuits rendering trustworthiness to digital operations in electronic circuits and numerous cascading applications. Since the organic inverters made using the proposed OTFT exhibit a decent gain hence have an apparent prospective of driving myriad-stage logic like ring oscillators and memory blocks. Moreover, these may be employed in the areas of biosensors and wearable electronics as well wherever.

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Ditch and elevated organic thin film transistor‐based improved common source voltage amplifier: Frequency response characteristics and analytical modeling

Cited by 8 publications

References 31 publications

All-p ZVLL Inverter with Bootstrapping based on a ditch OTFT

All-p ZVLL Inverter with Bootstrapping based on a ditch OTFT

Investigating the effect of scaling and temperature on the performance of improved junctionless nanowire FET through simulation analysis

Ditch incorporated organic thin film transistor based organic all-p inverter: a novel approach

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