All-p ZVLL Inverter with Bootstrapping based on a ditch OTFT

Abstract

This research manifests the characteristics both static and dynamic, of a bootstrapped all-p ZVLL inverter using a single gate BGBC organic transistor with extra p + doping near the source and drain electrodes and a 40 nm ditch incorporated in the pentacene organic semiconductor layer. Several topologies of the inverter were experimented with and compared in terms of their performance pre and post the application of the bootstrap technique. Bootstrapping proved to be a befitting choice for obtaining the maximum efficient results in terms of noise margin, delay in propagation, transient time, and gain. Upon comparison it was observed that the bootstrapped inverter showed considerably better voltage transfer characteristics in terms of high and low noise margins. A surge of 18.46% and 22.25% is noticed in noise margins of the bootstrapped device as compared to the device without bootstrapping. Also, the dynamic response of DLL and ZVLL topology devices exhibit a hike in the voltage swing by 24% and 13% respectively. Furthermore, contrast to DLL, the average delay of the ZVLL inverter decreases by 54.5 µs after the application of bootstrapping technique, whereas the value of average propagation delay decreases by a mere 10 µs. Pertaining to the results attained, ZVLL proves to be a more responsive circuit, leading to an inverter that is apparently more robust, better noise margins, attenuated power leakage and improved sensitivity.