Dislocation Conversion and Propagation during Homoepitaxial Growth of 4H-SiC

Abstract

Basal Plane Dislocations (BPDs) in SiC are thought to cause degradation of bipolar diodes with blocking voltages > 2kV by triggering the formation and expansion of stacking faults during device operation. Hence, low N doped, thick epitaxial layers without BPDs are urgently needed for the realization of long-term stable SiC bipolar diodes. Such epilayers can be achieved if the conversion of the BPD into another harmless dislocation type is supported by proper epitaxial growth parameters and use of vicinal (off-cut) substrates. In this work, the influence of the substrate’s off-cut angle and of the epilayer thickness on BPD density and surface morphology were investigated. The BPD densities of epilayers grown on 2° and 4° off-cut substrates were very low compared to growth on 8° off-axis substrates. X-Ray Topography has proved that all the Threading Dislocations (TD) propagate from the substrate to the epilayer and that BPDs in the substrate convert to Threading Edge Dislocations (TED) in the epilayer, i.e. the dislocation density (DD) of the substrate determines the epilayer’s DD. The conversion of BPDs is supported by the presence of bunched steps as for growth of thick layers on 2° and 4° off-cut substrates.

Interactions of Dislocations during Epitaxial Growth of SiC and GaN

“…These measures include various pretreatments of the substrate as well as the variation of a single epitaxial growth parameter. However, it is also reported in [21,25] that by applying a combination of well -suited epitaxial parameters conversion ratios can be achieved that are comparable to KOH etching results (see Figure 8.4 ). Under such optimized growth conditions the BPD density can be reduced from 10 3 -10 4 BPD/cm 2 in the substrate down to less than 3 BPD/cm 2 in the epitaxial layer.…”

“…This modifi cation can be achieved either by the ex -situ etching procedure [23] or by an adjustment of the epitaxial growth parameters to infl uence the step geometry in the desired way [25] .…”

SXRT Investigations on Electrically Stressed 4H-SiC PiN Diodes for 6.5 kV

“…For manufacturing of 6.5 kV PiN diodes homoepitaxial layers were grown by Chemical Vapor Deposition (CVD) in a horizontal hot-wall reactor (VP508GFR) as described in [2][3][4][5]. The epilayers were grown on the (0001)Si-face of 4° and 8° towards <11-20> off-cut substrates.…”

“…The first step for suppressing the bipolar degradation of PiN diodes was the optimization of the epitaxial process for growth of thick, BPD-free epilayers. This optimization study revealed that a small off-cut angle of the substrate is beneficial for the growth of BPD-free epilayers [2][3][4][5][6]. Now, it has to be verified by fabrication of PiN diodes that the bipolar degradation is successfully suppressed on BPD-free epitaxial layers and that bipolar degradation occurs for PiN diodes fabricated on BPD-containing epilayers.…”

Erlangen—An Important Center of Crystal Growth and Epitaxy: Major Scientific Results and Technological Solutions of the Last Four Decades

“…Based on this knowledge and on the long‐standing experience of CGL in GaN epitaxy, as well as crystal growth and crystal defects in general, IISB took a quick start in developing the SiC epitaxy process. In the beginning the influence of the epi‐parameters like growth temperature, C/Si ratio, doping atoms and their concentrations, and the off‐cut angle of the substrate on the formation of dislocations in the SiC epilayer and on the surface morphology were the focus of the investigations . The main target was the improvement of the observed degradation of bipolar SiC devices with high blocking voltages due to a so‐called “drift of the forward voltage” caused by basal plane dislocations (BPDs) in the epilayer.…”