Discussion on the Figures of Merit of Identified Traps Located in the Si Film: Surface Versus Volume Trap Densities

Abstract

The aim of this work is a discussion on the figures of merit of identified traps located in the depletion zone (Si film) of advanced MOSFET devices. Two methodologies to estimate the volume trap densities are investigated, one using the relationship between the surface trap density and volume trap density and a second one based on the temperature evolution at fixed frequency of the generation-recombination plateau level associated to the same trap. By comparing the volume trap densities estimated using these two methods, the results are not agreeing with each other, suggesting that these methods can no longer be used with accuracy in multi-gate devices. Moreover, they may lead in certain cases to results physically not correct. Even about of the volume defects, the linear evolution between the plateau and the characteristic frequency of the generation-recombination contributions associated to the same trap give us the surface trap density without any additional assumption.

Detailed low frequency noise assessment on GAA NW n-channel FETs

“…Unphysical values of the estimated Bexp were already reported in particular for multi-gate devices (e.g. FinFETs) [8] suggesting that the utilization of NT as a figure of merit may be not accurate.…”