Digital PLLs: the modern timing reference for radar and communication systems

Samori, Carlo; Bertulessi, Luca

doi:10.1109/esscirc53450.2021.9567810

Cited by 3 publications

(1 citation statement)

References 30 publications

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“…Although CP-PLLs have historically led the field in terms of fractional spur performance, the use of digital to time converters (DTCs) to minimize the instantaneous time difference to be measured and stochastic divider controllers to mitigate residual nonlinearities have enabled significant recent advances for digitally-assisted [37], [40] and all-digital PLLs [35], [38]. There is further scope for improvement in digitalintensive architectures in terms of their spur performance [41].…”

Section: B Stochastic Divider Controllersmentioning

confidence: 99%

Nonlinearity-Induced Spurs in Fractional-NFrequency Synthesizers

Kennedy

Mazzaro

Mai

2022

IEEE Trans. Circuits Syst. II

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Fractional-N frequency synthesizers are characterized by unwanted periodic components in their frequency spectra called spurs. In communications applications, spurs reduce the signal to noise ratio of the system; in clocking they add jitter; in radar and imaging, they can present ghost targets. Some spurs are due to parasitic electromagnetic coupling between components and can be mitigated by careful circuit layout. Others are inherent in the mathematics that describe the system and are best tackled using mathematical approaches. This paper considers spurs that are introduced directly by the divider controller and those that result from distortion of the control signal by nonlinearity in the synthesizer. It summarizes the state of the art in terms of divider controllers that are themselves spurfree and divider controllers that do not produce spurs when used in synthesizers with memoryless polynomial nonlinearities.

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