Digital Nonlinear Oscillators in PLDs: Pitfalls and Open Perspectives for a Novel Class of True Random Number Generators

Addabbo, Tommaso; Fort, Ada; Mugnaini, Marco; García-Bosque, M.

doi:10.1109/iscas.2018.8351622

Cited by 11 publications

(11 citation statements)

References 17 publications

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“…The design of DNOs faces several challenges, probably the most important one being theoretical. In [19] a clear confutation of the algebraic approaches proposed to study some DNOs has been shown with both simulations and experiments. On the other hand, as discussed in [22], even for simple topologies a DNO is a nonlinear dynamical system operating in high dimension, being the dynamics dependent on parasitic elements in most cases (e.g., distributed nonlinear capacitors and resistors).…”

Section: Digital Nonlinear Oscillatorsmentioning

confidence: 89%

“…The well know Ring Oscillator circuit, a loop of an odd number of inverting logic gates, is among the simplest examples of a DNO. Other systems classifiable as DNOs have been presented in [14], [19]- [21].…”

Section: Digital Nonlinear Oscillatorsmentioning

confidence: 99%

“…Bringing together PLD design, circuit modeling and the analysis of nonlinear dynamical systems, a first investigation of different DNO architectures have been presented in [19], [21], [22]. The authors showed that, depending on both the network topology and the hardware implementation, DNOs can exhibit complex dynamical behavior.…”

Section: Digital Nonlinear Oscillatorsmentioning

confidence: 99%

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A New Class of Digital Circuits for the Design of Entropy Sources in Programmable Logic

Addabbo

Fort

Moretti

et al. 2020

IEEE Trans. Circuits Syst. I

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We propose a novel class of Digital Nonlinear Oscillators (DNOs) supporting complex dynamics, including chaos, suitable for the definition of high-performance and low-complexity entropy sources in Programmable Logic Devices (PLDs). We derive our proposal from the analysis of simplified models, investigated as non-autonomous nonlinear dynamical systems under different excitation conditions. The study lead the authors to the design of a fully digital entropy source consuming only two slices of a Xilinx FPGA, including post-processing, sufficient to define a class of TRNGs capable to pass the NIST standard tests for randomness in any worst case experimentally tested by the authors (6 chips, 96 generators). The solution has been compared with others published in the literature, confirming the validity of the proposal.

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Section: Digital Nonlinear Oscillatorsmentioning

confidence: 89%

Section: Digital Nonlinear Oscillatorsmentioning

confidence: 99%

Section: Digital Nonlinear Oscillatorsmentioning

confidence: 99%

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A New Class of Digital Circuits for the Design of Entropy Sources in Programmable Logic

Addabbo

Fort

Moretti

et al. 2020

IEEE Trans. Circuits Syst. I

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“…This work opens a very interesting line of research in the design of robust PUFs for FPGAs. Other structures such as other GAROs, FIROs or other Digital Nonlinear Oscillators such as the ones presented in [23] could be studied. It is likely that other oscillators would offer better results than the ones shown in this paper.…”

Section: Discussionmentioning

confidence: 99%

“…Furthermore, even using the same feedback polynomial, it has been recently proven that, depending on the location within the FPGA where the system is implemented, the behavior of the system can change drastically, sometimes resulting in poor random sequences [23], [24].…”

Section: Issues Of Firo and Garo Trngsmentioning

confidence: 99%

Proposal and Analysis of a Novel Class of PUFs Based on Galois Ring Oscillators

et al. 2020

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In this paper, the possibility of using Galois ring oscillators to construct physically unclonable functions (PUFs) has been studied. The idea is to use novel PUF architectures, similar as the ring oscillator PUFs that, instead of comparing frequencies, compare the statistical bias of pairs of oscillators implemented in different locations. To study the viability of these systems, three different Galois oscillators have been implemented in several locations in several FPGAs and we have studied the main properties of their bias: repeatability, variability with the location, variability with the FPGA and spatial autocorrelation. Based on this study, we have determined that the bias of these oscillators meet the requirements that are needed to be used to construct a PUF. Finally, a PUF based on comparing the bias of neighboring 7-LUT Galois ring oscillators have been implemented and analyzed. The experimental results show that this PUF generates uniform responses that are highly reproducible and unique, making this PUF suitable for being used in identification applications. INDEX TERMS Fibonnaci ring oscillators, FPGA, Galois ring oscillators, hardware security, physically unclonable function, ring oscillator. Identificability Random variations due to manufacturing process Physical unclonability PUF Challenges Responses • Easy implementation • Low-power consumption • "Volatile secret"

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Low-Level Advanced Design of True Random Number Generators Based on Truly Chaotic Digital Nonlinear Oscillators in FPGAs

Addabbo

Fort

Moretti

et al. 2022

Lecture Notes in Electrical Engineering

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Digital Nonlinear Oscillators in PLDs: Pitfalls and Open Perspectives for a Novel Class of True Random Number Generators

Cited by 11 publications

References 17 publications

A New Class of Digital Circuits for the Design of Entropy Sources in Programmable Logic

A New Class of Digital Circuits for the Design of Entropy Sources in Programmable Logic

Proposal and Analysis of a Novel Class of PUFs Based on Galois Ring Oscillators

Low-Level Advanced Design of True Random Number Generators Based on Truly Chaotic Digital Nonlinear Oscillators in FPGAs

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