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A measurement system designed for the development of novel conductometric gas sensors and of new gas sensing materials is described. The system allows to simultaneously characterize up to 8 sensors. Prototype sensors can be easily realized thanks to an ad hoc structure based on an alumina substrate equipped with electrodes, a heater and an accurate temperature sensor, on this structure the studied material can be deposited by screen printing, spin coating or dip coating. The system is designed to study the behavior of the sensors by accurately setting the operating conditions in terms of chemical environment composition, gas flow, humidity and temperature. The system is fully programmable and it individually controls the film temperatures or measures them with a resolution lower than 0.1 °C. Both chemical transients and thermal transients can be studied. These features make the system suitable for determining the principal performance indexes of a gas sensing device (e.g., sensitivity, stability, selectivity, response/recovery times, etc.) as functions of various combinations of measurement conditions (e.g., gas concentrations, temperature, humidity, flow). The proposed measurement system will find also useful applications in sensor model validation

In this paper, a theoretical approach for studying the robustness of the chaotic statistics of piecewise affine maps with respect to parameter perturbations is discussed. The approach is oriented toward the study of the effects that the nonidealities derived from the circuit implementation of these chaotic systems have on their dynamics. The ergodic behavior of these systems is discussed in detail, adopting the approach developed by Boyarsky and Gora, with particular reference to the family of sawtooth maps, and the robustness of their invariant measures is studied. Although this paper is particularly focused on this specific family of maps, the proposed approach can be generalized to other piecewise affine maps considered in the literature for information and communications technology applications. Moreover, in this paper, an efficient method for estimating the unique invariant density for stochastically stable piecewise affine maps is proposed. The method is an alternative to Monte Carlo methods and to other methods based on the discretization of the Frobenius-Perron operator

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We provide an overview of selected crypto-hardware devices, with a special reference to the lightweight electronic implementation of encryption/decryption schemes, hash functions, and true random number generators. In detail, we discuss the hardware implementation of the chief algorithms used in private-key cryptography, public-key cryptography, and hash functions, discussing some important security issues in electronic crypto-devices, related to side-channel attacks (SCAs), fault injection attacks, and the corresponding design countermeasures that can be taken. Finally, we present an overview about the hardware implementation of true random number generators, discussing the chief electronic sources of randomness and the types of post-processing techniques used to improve the statistical characteristics of the generated random sequences.A. J. ACOSTA, T. ADDABBO AND E. TENA-SÁNCHEZ resource consumption. This matter sets the point for the lightweight cryptography, that is, the subfield of cryptography aiming to provide solutions tailored for resource-constrained devices.According to Elsevier Scopus, the largest database of research peer-reviewed literature, since 2010, about 40k documents are returned if searching the keyword 'cryptography' [6]. A huge subset of these papers deals with conceptual, algorithmic, software, hardware solutions that may be taken into account in lightweight cryptography. In the face of such a vast literature, in this work, we provide a brief overview of selected crypto-hardware devices, with a special reference to the lightweight electronic implementation of encryption/decryption schemes, hash functions, and true random number generators (TRNGs).This paper is organized as in the following. In Section 2, we introduce some terminology and present an overview of the hardware implementation of the chief algorithms used in private-key cryptography, public-key cryptography (PKC), and hash functions. In Sections 3 and 4, we introduce some important security concerns about electronic crypto-devices, discussing SCAs, fault injection attacks, and the corresponding countermeasures that can be taken in the hardware design. Finally, Sections 5-8 are devised to provide an overview about the electronic implementation of TRNGs. In detail, in Sections 5 and 6, we discuss about security flaws, statistical defects, and predictability of TRNGs, presenting the chief sources of randomness used nowadays for their hardware implementation. In Sections 7 and 8, we discuss an overview of the different post-processing techniques aimed to improve the statistical characteristics of the generated random sequences and the evaluation methods used to assess the reliability of cryptographic TRNGs. Conclusion and References close the paper. CRYPTOGRAPHIC ALGORITHMSCryptographic algorithms aim to convert secret data into an unreadable code for non authorized persons, protecting secret information from theft or alteration and also enabling authentication. For better understanding, in the next sections, we define the following...

This paper presents a compression method that\ud exploits pseudo-chaotic systems, to be applied to True Random\ud Bit Generators (TRBGs). The theoretical explanation of the\ud proposed compression scheme required the projection of some\ud results achieved within the Ergodic Theory for chaotic systems\ud on the world of digital pseudo-chaos. To this aim, a weaker and\ud more general interpretation of the Shadowing Theory has been\ud proposed, focusing on probability measures, rather than on single chaotic trajectories. The design of the compression scheme has been theoretically discussed in order to assure the final entropy of the compressed TRBG to be arbitrarily close to the maximum\ud limit of 1 bit/time-step. The proposed solution requires extremely\ud low-complex hardware circuits for being implemented, assures a\ud constant throughput and is based on theoretical results of general validity