Diffusion-based placement migration

Ren, Haoxing; Pan, David Z.; Alpert, Charles J.; Villarrubia, Paul G.

doi:10.1145/1065579.1065712

Cited by 53 publications

(49 citation statements)

References 12 publications

(6 reference statements)

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“…There are a number of load balancing algorithms proposed that are based on load migration, e.g., [Lin and Keller 1987] [Cybenko 1989] [Boillat 1990] [Xu and Lau 1992] [Horton 1993] [Willebeek- LeMair and Reeves 1993] [Watts and Taylor 1998] [Ou and Ranka 1997] ] [Hu and Blake 1999a] [Lui and Chan 2002] [ Ng et al 2002] [Lee and Lee 2003] [Gastner and Newman 2004] [Chen et al 2005] [Ren et al 2005]. In general, they can be classified into two main categories according to the level of knowledge that is embodied in the decision making process.…”

Section: Related Workmentioning

confidence: 99%

“…Besides parallel computing applications, heat diffusion has also been employed to balance the bin density in VLSI physical design [Ren et al 2005], and to balance the data density for cartograms in applied mathematics [Gastner and Newman 2004]. Although heat diffusion is popular and has proved to be very efficient for load balancing in many areas, to our knowledge, it has not been employed for load balancing in DVEs.…”

Section: Heat Diffusion Algorithmsmentioning

confidence: 99%

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Heat diffusion based dynamic load balancing for distributed virtual environments

Deng

Lau

2010

Proceedings of the 17th ACM Symposium on Virtual Reality Software and Technology

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Distributed virtual environments (DVEs) are becoming very popular in recent years, due to their application in online gaming and social networking.One of the main research problems in DVEs is on how to balance the workload when a lot of concurrent users are accessing it. There are a number of load balancing methods proposed to address this problem. However, they either spend too much time on optimizing the partitioning process and become too slow or emphasize on efficiency and the repartitioning process becomes too ineffective. In this paper, we propose a new dynamic load balancing approach for DVEs based on the heat diffusion approach which has been studied in other areas and proved to be very effective and efficient for dynamic load balancing. We have two main contributions. First, we propose an efficient cell selection scheme to identify and select appropriate cells for load migration. Second, we propose two heat diffusion based load balancing algorithms, local and global diffusion. Our results show that the new algorithms are both efficient and effective compared with some existing methods, and the global diffusion method performs the best.

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Section: Related Workmentioning

confidence: 99%

Section: Heat Diffusion Algorithmsmentioning

confidence: 99%

Heat diffusion based dynamic load balancing for distributed virtual environments

Deng

Lau

2010

Proceedings of the 17th ACM Symposium on Virtual Reality Software and Technology

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“…Floorplan shifting is used in [5], but it presumes significant available whitespace between floorplan regions. Diffusion [14], ripple moves [15], and network flow [16] algorithms are all effective approaches, but the algorithms are more complex and likely slower than RePlace. For example, [15] takes ~1hr on problems with only 12,000 cells compared to a runtime of ~1min for RePlace on 50,000 BLEs.…”

Section: Related Workmentioning

confidence: 99%

“…Also, [16] is ~6 times faster than full ASIC placement but only ~1% of cells are moved, compared to RePlace being ~7 times faster than full FPGA placement when moving up to 2/3 of 50,000 BLEs. Diffusion [14] is fast, but it computes costs in the inner loop and may sacrifice quality compared to replacing from scratch or performing a final global anneal as done in RePlace.…”

Section: Related Workmentioning

confidence: 99%

Replace: An incremental placement algorithm for field programmable gate arrays

Leong

Lemieux

2009

2009 International Conference on Field Programmable Logic and Applications

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Recompiling a large circuit after making a few logic changes is a time-consuming process. We present an incremental placement algorithm for FPGAs that is focused on extremely fast runtime for changes which can be localized. It is capable of handling multiple changes across large regions of an FPGA. This is especially useful when used with a floorplan where a modified subcircuit is instantiated several times in the design hierarchy or where several subcircuits are modified. The algorithm is simpler and faster than past approaches because its insertion and legalization steps are based on CPU-efficient shifting steps which do not continuously evaluate the impact of each move on costs. Instead, any lost quality is recovered by a fast, low-temperature anneal at the end. When 35,000 out of 50,000 LUTs are modified, the incremental placement (including fast anneal) is 7 times faster than VPR's "fast placement" from scratch with only 2% quality degradation. The key concepts utilized in the incremental placement algorithm include uses of floor-planning constraints, CPU-efficient CLB shifting, super placement grid and a tuned annealing refinement process.

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“…We use the diffusion cell spreading [23] for pre-placement step. Anchor cells are used to mark the pre-placement result.…”

Section: The Proposed Approachmentioning

confidence: 99%