Die surface stress variation during thermal cycling and thermal aging reliability tests

Abstract

In this work, the variation of die stress during thermal cycling and thermal aging reliability tests has been explored experimentally. Special (1 11) silicon stress test chips containing an array of piezoresistive sensor rosettes have been applied within 281-pin ceramic Pin Grid Array (PGA) packages. The test die contained optimized eight element dual polarity rosettes, which are uniquely capable of evaluating the complete stress state at points on the surface of the die. Calibrated and characterized test chips were attached to the PGA packages using six high temperature die attachment adhesives designed for avionic applications. The adhesive systems included silver filled glasses, polyimide pastes, thermoplastic films, and gold germanium adhesives. The resistances of the sensors were recorded at room temperature before and after die attachment. The induced thermal stresses at sites on the die surface have been calculated using the measured resistance changes and piezoresistive theory. A comparison of the room temperature die stresses caused by the different die-attachment materials has been made. The stresses on the die surface after packaging were also characterized as a function of temperature. After the initial stress measurements, thermal aging and thermal cycling tests were conducted on the packages. The various die attachment materials were further evaluated by observing the changes in stress that occurred during these reliability tests. Finally, three-dimensional finite element simulations of the PGA packages were performed, and the stress predictions were correlated with the experimental test chip data. 0-7803-5231 -9/99/$10.00 81 999 IEEE