DFM flow by using combination between design based metrology system and model based verification at sub-50nm memory device

Kim, Cheol-kyun; Kim, Jungchan; Choi, Jae-Seung; Yang, Hyunjo; Yim, Donggyu; Kim, Jinwoong

doi:10.1117/12.711953

Cited by 3 publications

(1 citation statement)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The next generation of proximity process correction (PPC) is requested numerous OPC feedback data to enhance OPC accuracy. [2] . Figure 1 shows the novel OPC process flow with DBM.…”

Section: Introductionmentioning

confidence: 95%

Novel process proximity correction by the pattern-to-pattern matching method with DBM

Park¹,

Choi²,

Yune³

et al. 2008

SPIE Proceedings

Self Cite

View full text Add to dashboard Cite

Recently, the dramatic acceleration in dimensional shrink of DRAM memory devices has been observed. For sub 60 nm memory device, we suggest the following method of optical proximity correction (OPC) to enhance the critical dimension uniformity (CDU). In order to enhance CD variation of each transistor, hundreds of thousand transistor CD data were used through design based metrology (DBM) system. In a traditional OPC modeling method, it is difficult to realize enhancement of CD variation on chip because of the limitation of OPC feedback data.Even though optical properties are surely understood from recent computational lithography models, there are so many abnormalities like mask effect, thermal effect from the wafer process, and etch bias variation of the etching process. Especially, etch bias is too complicate to predict since it is related to variations such as space among adjacent patterns, the density of neighboring patterns and so on.In this paper, process proximity correction (PPC) adopting the pattern to pattern matching method is used with huge amount of CD data from real wafer. This is the method which corrects CD bias with respect to each pattern by matching the same coordinates. New PPC method for enhancement of full chip CD variation is proposed which automatically corrects off-targeted feature by using full chip CD measurement data of DBM system. Thus, gate CDU of sub 60 nm node is reduced by using new PPC method. Analysis showed that our novel PPC method enhanced CD variation of full chip up to 20 percent.

show abstract

“…The next generation of proximity process correction (PPC) is requested numerous OPC feedback data to enhance OPC accuracy. [2] . Figure 1 shows the novel OPC process flow with DBM.…”

Section: Introductionmentioning

confidence: 95%

Novel process proximity correction by the pattern-to-pattern matching method with DBM

Park¹,

Choi²,

Yune³

et al. 2008

SPIE Proceedings

Self Cite

View full text Add to dashboard Cite

show abstract

New Design Based Metrology for Fast Detection of Crucial Lithographic Defects

Hur

Kim

Park

et al. 2011

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

In this paper, we proposed a new design based metrology system to save runtime for the detection of crucial lithographic defects. To the best of our knowledge, we developed for the first time the weak point management system that is a database control environment with the repeated design related systematic defects after model-based verification. Then, the defects are again verified with design based metrology (DBM). Using the result of model-based verification and the weak point management system, we efficiently verify the most crucial hotspots with DBM, resulting in significant saving in processing time. The communication between DBM and the results of model based verification is improved by the proposed DBM, as much as 10-fold process time reductions, compared to the conventional counterpart. There was negligible accuracy degradation for the application on sub 50 nm node dynamic random access memory (DRAM). We believe that the proposed method can be used for the next DRAM generation that requires significant runtime.

show abstract