Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

Abstract

The device physics of the double-gate tunneling field-effect transistor (DG TFET) is explored through two dimensional device simulations. The on-state drain current Ion of the DG TFET, which is based on band-to-band tunneling, has a strong dependence on the silicon film thickness TSi and the physics governing it is detailed. It is established that band-to-band tunneling at the surface is very strong and accounts for a large part of the total drain current. However, a substantial part of the total drain current Ids is contributed by a subsurface portion of the silicon film. Detailed potential distributions show that the coupling of two gate electrodes in the DG TFET could effectively reduce the tunneling width ωT at the center of the silicon film up to an optimum TSi where maximum drain current is obtained.

Device physics and guiding principles for the design of double-gate tunneling field effect transistor with silicon-germanium source heterojunction

“…3-7 A double-gate ͑DG͒ TFET structure that boosts I on was reported. 8,9 Nevertheless, I on of a Si TFET is still lower than that of the stateof-the-art high performance ͑HP͒ CMOS devices. To improve the TFET I on further, band-to-band tunneling ͑BTBT͒ rate should be increased.…”

Mathematical modeling insight of hetero gate dielectric-dual material gate-GAA-tunnel FET for VLSI/analog applications

“…The major roadblock with the planar TFETs is its lower ON-state current (I ON ), which results in lower operating speed. In order to resolve this issue, numerous kinds of TFETs with various structures and materials such as double-gate, delta layer, SiGe, and PNPN structures have been proposed (Toh et al 2007;Boucart and Ionescu 2007a, b;Toh et al 2008;Mallik and Chattopadhyay 2011;Jhaveri et al 2010;Cho et al 2011;Lee et al 2010;Noguchi et al 2015). To enhance the I ON , Silicon nanowire TFET has already been fabricated Abstract This paper presents a mathematical modeling insight for the novel heterogate dielectric-dual material gate-GAA TFET (HD-DMG-GAA-TFET) and validating the results with TCAD simulation.…”

An Analytical Surface Potential Model of Surrounding Gate Tunnel FET

“…Double gate TFET is dependent on drain potential and these new findings is investigated in paper [4]. High gate dielectric and thin film structure boost ON current and the significance of using both in DG TFET is shown in [5,6]. An Ultra-thin silicon body over insulator tunneling field effect transistor structure [7].…”