Device Modelling for Bendable Piezoelectric FET-Based Touch Sensing System

Abstract

Device modelling for bendable piezoelectric FET-based touch sensing system.Abstract-Flexible electronics is rapidly evolving towards devices and circuits to enable numerous new applications. The high-performance, in terms of response speed, uniformity and reliability, remains a sticking point. The potential solutions for high-performance related challenges bring us back to the timetested silicon based electronics. However, the changes in the response of silicon based devices due to bending related stresses is a concern, especially because there are no suitable models to predict this behavior. This also makes the circuit design a difficult task. This paper reports advances in this direction, through our research on bendable Piezoelectric Oxide Semiconductor Field Effect Transistor (POSFET) based touch sensors. The analytical model of POSFET, complimented with Verilog-A model, is presented to describe the device behavior under normal force in planar and stressed conditions. Further, dynamic readout circuit compensation of POSFET devices have been analyzed and compared with similar arrangement to reduce the piezoresistive effect under tensile and compressive stresses. This approach introduces a first step towards the systematic modeling of stress induced changes in device response. This systematic study will help realize high-performance bendable microsystems with integrated sensors and readout circuitry on ultra-thin chips (UTCs) needed in various applications, in particular, the electronic skin (e-skin).

E-Skin: From Humanoids to Humans [Point of View]

“…For example, with requirement of bendability in e-skin, the conformable electronics has also advanced and have opened opportunities for developing predictive, and accurate models for flexible devices, which could be exploited to predict the bending state or stress patterns. This is because device response changes constructively of destructively as a result of bending induced stresses [35][36][37].…”

Bending effects in a flexible dual gated graphene FET: A Verilog-A model implementation

“…This is unlike conventional MOSFET, where bending induced variations are clearly observable [14,18] The output characteristics of the GFET for Vgs(back) = 40V and Vgs(top) = -1.8V is depicted in Fig. 4.…”

“…al [13]. The proposed model has been implemented in Verilog-A, which is widely used for circuit modelling [14,15]. This paper is organised as follows: Section II presents the transistor layout of the modelled GFET device.…”

Device modelling of silicon based high-performance flexible electronics

“…Pins Vbias, G', G, B, S, D stands for the top electrode bias voltage, the connection towards the gate of the transistor, the bulk, gate, source and drain of strained transistor, respectively. Terminal F is for force-dependent voltage source connected to a dummy transistor [21].…”