Developments of Plasma Etching Technology for Fabricating Semiconductor Devices

Abstract

Plasma etching technologies such as reactive ion etching (RIE), isotropic etching, and ashing/plasma cleaning are the currently used booster technologies for manufacturing all silicon devices based on the scaling law. The needs-driven conversion from the wet etching process to the plasma/dry etching process is reviewed. The progress made in plasma etching technologies is described from the viewpoint of requirements for the manufacturing of devices. The critical applications of RIE, isotropic etching, and plasma ashing/cleaning to form precisely controlled profiles of high-aspect-ratio contacts (HARC), gate stacks, and shallow trench isolation (STI) in the front end of line (FEOL), and also to form precise via holes and trenches used in reliable Cu/low-k (low-dielectric-constant material) interconnects in the back end of line (BEOL) are described in detail. Some critical issues inherent to RIE processing, such as the RIE-lag effect, the notch phenomenon, and plasma-induced damage including charge-up damage are described. The basic reaction mechanisms of RIE and isotropic etching are discussed. Also, a procedure for designing the etching process, which is strongly dependent on the plasma reactor configuration, is proposed. For the more precise critical dimension (CD) control of the gate pattern for leading-edge devices, the advanced process control (APC) system is shown to be effective.

Plasma engineering of graphene

“…51 The PECVD has also been successfully implemented to dope CNT and graphene. 55,56 Plasma based techniques have been predominantly applied to the initial synthesis of carbon-based materials rather than post processing.…”

Nitrogen assisted etching of graphene layers in a scanning electron microscope

“…This leads to the removal of material from the sample by localized reactive-ion etching, a process widely used in fabrication facilities. 21 Once a small pore is formed its edges are the preferred sites for bonding with nitrogen ions, pores are therefore observed to grow radially on the irradiated graphene surface.…”

Lithography for enabling advances in integrated circuits and devices

“…fluorine chemistries to etch SiO 2 and chlorine chemistries to etch aluminium). High etch rate single wafer etchers were developed and employed with improved uniformity and etch rate control [29].…”

“…Since the plasma etch processes 'hardened' the surface of the resist to wet chemical strips, oxygen plasma cleans (ashing) [29] were developed to strip the hydrocarbon resist and residue from the surface of the wafer. This was followed by chemical cleans to remove non-polymer etch residues.…”