Development of low-cost wafer level package through integrated design and simulation analysis

Tee, Tong Yan; Siew, Glen; Chen, Haoyang; Soh, Serine; Kang, In Soo; Kim, Jong Heon; Lee, Teck Kheng; Ser, Bok Leng; Ng, Hun Shen; Hoe, Germaine; Gao, Shan

doi:10.1109/icept.2011.6066896

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“…In the W-band, the pads capacitance and package parasitic elements cannot be neglected in the simulation process. The paper [5] presents the results of measurements of flip-chip ball grid array (FCBGA) package parasitic resistances, capacitances and inductances. Using this data and equivalent circuit for FCBGA-package interconnect effects from [6], a virtual test bench was designed for more correct LNA simulation.…”

Section: Simulation Resultsmentioning

confidence: 99%

A SiGe 3-stage LNA for automotive radar application from 76 to 81 GHz

Budnyaev

Vertegel

2019

ITM Web Conf.

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This paper presents the simulation results of the W-band 3-stage low noise amplifier which is designed in 0.13 μm SiGe BiCMOS technology. The LNA achieves a peak S21 of 24.1 dB and noise figure of 6 dB at 80 GHz with 3 dB bandwidth of 14 GHz from 73 to 87 GHz. S11 is better than 11 dB. The simulated input 1 dB compression point is –23 dBm at 80 GHz with low power consumption of 26 mW from 1.2 V voltage supply. Layout area is 0.36 mm2.

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Section: Simulation Resultsmentioning

confidence: 99%