Development of a novel cost-effective Package-on-Package (PoP) solution

Sun, Pengtao; Leung, V. C. K.; Yang, D.; Shi, Daniel

doi:10.1109/icept.2009.5270798

Cited by 5 publications

(3 citation statements)

References 11 publications

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“…The details of design variables are summarized in Table 3. The design spaces of the package dimensions and the material properties were defined by the values found in the literature: package dimensions in [31,[33][34][35][36][37][38][39] and material properties in [40][41][42][43][44][45]. The TFBGA package was subjected to the EMC molding process at 175 • C, which was used as a stress-free temperature.…”

Section: Description Of Tfbga Packagementioning

confidence: 99%

Implementation and Performance Evaluation of a Bivariate Cut-HDMR Metamodel for Semiconductor Packaging Design Problems with a Large Number of Input Variables

et al. 2021

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A metamodeling technique based on Bivariate Cut High Dimensional Model Representation (Bivariate Cut HDMR) is implemented for a semiconductor packaging design problem with 10 design variables. Bivariate Cut-HDMR constructs a metamodel by considering only up to second-order interactions. The implementation uses three uniformly distributed sample points (s = 3) with quadratic spline interpolation to construct the component functions of Bivariate Cut-HDMR, which can be used to make a direct comparison with a metamodel based on Central Composite Design (CCD). The performance of Bivariate Cut-HDMR is evaluated by two well-known error metrics: R-squared and Relative Average Absolute Error (RAAE). The results are compared with the performance of CCD. Bivariate Cut HDMR does not compromise the accuracy compared to CCD, although the former uses only one-fifth of sample points (201 sample points) required by the latter (1045 sample points). The sampling schemes and the predictions of cut-planes and boundary-planes are discussed to explain possible reasons for the outstanding performance of Bivariate Cut HDMR.

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Section: Description Of Tfbga Packagementioning

confidence: 99%

Implementation and Performance Evaluation of a Bivariate Cut-HDMR Metamodel for Semiconductor Packaging Design Problems with a Large Number of Input Variables

et al. 2021

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“…The key parameters of both top and bottom packages are summarized in Table 1. The assembly and warpage testing processes are similar for both top and bottom packages, as presented in our previous work [16,17]. Following the top and bottom package assembly flow, the PoP stacking process was also evaluated using the traditional flux-dipping method.…”

Section: Astri Package Structurementioning

confidence: 99%

“…We have developed a new PoP solution based on over molded FBGA package stacking structure to address the issues of traditional PoP structure [16]. It keeps the advantages of testability, flexible combination, compatible with existing processes & equipments and low lost, while solving the challenges such as stand-off height and warpage control related issues found in traditional PoP structure.…”

Section: Introductionmentioning

confidence: 99%

Development of a new Package-on-Package (PoP) structure for next-generation portable electronics

Sun

Leung

Yang

et al. 2010

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)

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Package-on-Package (PoP) is one of the major 3D packaging approaches. It vertically combines discrete memory and logic Ball Grid Array (BGA) packages, where one package rests on the top of the other. Recently, PoP technologies have attracted more interests, especially for portable electronics related products and applications.ASTRI has developed a new PoP structure, which employs a new bottom package which is over molded Finepitch Ball Gird Array (FBGA) format with mechanically balanced package structure. For the top package, it is a commercial FBGA format with two die stacked inside. Since the new bottom package structure is based on an existing FBGA format, the mold chase is independent of the mold cap and size of the bottom PoP package. The final mold layer for bottom package has a thickness of 0.50mm. The top interface of the bottom PoP package has 136 pads with 0.65mm pitch and a two-row peripheral format, while the bottom interface has 272 pads with 0.65mm pitch and a four-row peripheral format. The size of both top and bottom packages is 14 x 14mm 2 . The 3D finite element (FE) simulator Ansoft HFSS was used to evaluate the high-frequency performance of the new PoP structure. The low-loss and low cross-coupling results indicate that the above PoP offers a promising solution for communication-related products. Physical configuration of the package was evaluated by cross section & scanning electron microscopy (SEM) examination, which showed a favorable interconnection structure. The warpage of the bottom PoP package after assembly process was characterized by a shadow moiré system. The warpage was well controlled by adopting a fully molded structure. The average package warpage value was around 30μm that was well below the warpage target of 80μm widely used in the industry. In this work, the moisture sensitivity level-3 (MSL-3) test was applied to evaluate the reliability of the above package. Board-level reliability including temperature cycling (TC) & drop tests were also evaluated. The results of the reliability tests showed good performance and demonstrated that the above PoP is a viable design. In summary, the above PoP design exhibited promising RF performance, excellent warpage performance, qualified package-level and boardlevel reliability. It offers an effective solution for high-density packages used in the portable consumer electronics.

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Influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) technology

Sitek

Stęplewski

Janeczek

et al. 2015

Soldering &Amp; Surface Mount Technology

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Purpose – The purpose of this paper is to evaluate the influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) Technology and demonstrate factors important for this issue. Design/methodology/approach – Two types of soldering materials and three different assembly procedures were used for assembly of PoP system. The reliability properties of assembled PoP systems were investigated using accelerated aging and periodic resistance measurements of daisy-chain solder joints systems. The purpose of such approach was to determine which soldering material (flux or solder paste) as well as which assembly process parameter (dipping depth of upper component in soldering material), would provide better reliability properties of the solder joints in the PoP system. Findings – It was stated that both selected flux and solder paste dedicated to assembly of PoP systems can be utilized in soldering of PoP applications. More reliable PoP systems applications require larger attention regarding materials selection and assembly parameters. It is recommended 50 per cent dipping depth of ball’s height into soldering material during upper PoP component assembly for more reliable applications. For less demanding PoP systems, the process window from 30 up to 70 per cent is acceptable. All observed failures after thermal shocks occurred in upper PoP components. Originality/value – This paper explains how materials and assembly parameters have influence on lead-free solder joints reliability in PoP systems. Especially, influence of process window for dipping procedure of upper components balls into soldering material was presented.

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Development of a novel cost-effective Package-on-Package (PoP) solution

Cited by 5 publications

References 11 publications

Implementation and Performance Evaluation of a Bivariate Cut-HDMR Metamodel for Semiconductor Packaging Design Problems with a Large Number of Input Variables

Implementation and Performance Evaluation of a Bivariate Cut-HDMR Metamodel for Semiconductor Packaging Design Problems with a Large Number of Input Variables

Development of a new Package-on-Package (PoP) structure for next-generation portable electronics

Influence of assembly parameters on lead-free solder joints reliability in Package-on-Package (PoP) technology

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