Development and implementation of the smart measuring unit with MU and PMU functionalities for smart grid applications

Strnad, Ivan; Pregrad, Goran; Višić, Ivan; Gazivoda, Stevan

doi:10.23919/smagrimet.2018.8369825

Cited by 5 publications

(3 citation statements)

References 2 publications

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“…Although a signal shift of 2.00 ms can have major impact on protection functions that are based on comparative algorithms, such as the differential protection function, time delay in hybrid-or digital-substation topology would not manifest itself as a phase shift as shown in Figure 7, but rather as a delay on all levels. All analog signals from the process level would be sampled in the same interval, with the delay, thus avoiding signal-time shift [30]. Network-bandwidth consumption for the single IEC 61850-9-2LE merging units, sending 80 samples per nominal cycle in 50 Hz power system, was 4.4 Mb/s.…”

Section: = + + + +mentioning

confidence: 99%

Laboratory Test Bed for Analyzing Fault-Detection Reaction Times of Protection Relays in Different Substation Topologies

Jurišić¹,

Havelka

Capuder

et al. 2018

Energies

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Visions of energy transition focus on activating end users, meaning that numerous flexible-distribution network-level devices become active participants in power-system operations. This implies a fast, reliable, and secure exchange of data, enabling the distribution-system operators to maintain, or even improve, the quality and delivery of service. With the introduction of the International Electrotechnical Commission (IEC) 61850 standard, the path is set for a single communication topology covering all substation levels. The standard has the potential to change the way substations are designed, built, tested, and maintained. This means that the key segment of the substation, its protection system, will go through a transition period with the end goal of having a digitized substation where all information exchange is performed over an Ethernet communication bus. This paper analyzes the performance impact of the IEC 61850-9-2LE on the protection system. To do this, a laboratory hardware-in-the-loop test setup was developed representing traditional-, hybrid-, and digital-substation topology. The setup serves to simulate faults and create transient waveforms in an extended IEEE 123-node test system, which is then used to detect the reaction times of protection relay devices. To verify the results, a significant number of tests was performed clearly showing the benefits of digitalizing the distribution system.

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Section: = + + + +mentioning

confidence: 99%

Laboratory Test Bed for Analyzing Fault-Detection Reaction Times of Protection Relays in Different Substation Topologies

Jurišić¹,

Havelka

Capuder

et al. 2018

Energies

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“…In modern power systems, the ever-increasing integration of renewable energy sources and distributed generation is pushing for the development of enhanced measurement techniques capable of coping with faster dynamics and higher distortion rates [1]- [3]. In this context, a new generation of instruments, like Phasor Measurement Units (PMUs) or Stand Alone Merging Units (SAMUs), allows for monitoring the power system state by means of synchronized measurements, whose time-stamp is referred to a common time reference [4]- [6]. As a consequence, the role of National Metrology Institutes (NMIs) consists in providing calibration systems characterized by accuracy and stability levels significantly higher than the devices under test (DUTs) [7], [8].…”

Section: Introductionmentioning

confidence: 99%

Characterization of DAC Phase Offset in IEC 61850-9-2 Calibration Systems

Agustoni

Frigo

2021

IEEE Trans. Instrum. Meas.

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This paper presents an accurate and robust method to calculate the phase offset of a reference waveform, usually produced by a Digital-to-Analog Converter (DAC) in IEC Std 61850-9-2 calibration systems. The phase offset is defined with respect to the rising edge of a reference clock signal, locked to the Global Positioning System (GPS). The proposed method relies on the synchronous acquisition of the DAC output and the clock signal. In the complex plane, where the Discrete Fourier Transform (DFT) is defined, the acquired signals are processed in order to compensate the non-ideal sampling rate and windowing. The method performance as well as its dependence from noise and parameters, are thoroughly characterized by means of extensive numerical simulations. Two validation approaches, experimental and software-based, confirm the proposed method as a valuable and robust solution for calibration purposes.

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“…MUs based on dual CPU or on ARM technology are described in [31] and [32,33], respectively. A new concept of MU, combined with the functionalities of a Phasor Measurement Unit (PMU), is introduced in [34].…”

Section: Introductionmentioning

confidence: 99%

Characterization Procedure for Stand-Alone Merging Units Based on Hardware-in-the-Loop Technology

et al. 2021

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The digitalization of a medium voltage network requires huge efforts from distributed system operators and electric utilities. The main reason is attributed to the costs associated with the replacement or introduction of new intelligent electronic devices capable of collecting and digitalizing current and voltage measurements. To this purpose, this paper introduces a new idea of a stand-alone merging unit (SAMU), which features real-time and hardware-in-the-loop technology, completed with accurate voltage and current sensors. Furthermore, the characterization procedure that allows an evaluation of the metrological performance of a complex device, such as a SAMU, is fully described. From the results, it is highlighted that (i) the developed SAMU is capable of performing highly accurate voltage, current, and power measurements; (ii) the characterization procedure is simple and exploitable for all kinds of SAMUs and other synchronized measurement devices.

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Development and implementation of the smart measuring unit with MU and PMU functionalities for smart grid applications

Cited by 5 publications

References 2 publications

Laboratory Test Bed for Analyzing Fault-Detection Reaction Times of Protection Relays in Different Substation Topologies

Laboratory Test Bed for Analyzing Fault-Detection Reaction Times of Protection Relays in Different Substation Topologies

Characterization of DAC Phase Offset in IEC 61850-9-2 Calibration Systems

Characterization Procedure for Stand-Alone Merging Units Based on Hardware-in-the-Loop Technology

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