Deterministic patterned growth of high-mobility large-crystal graphene: a path towards wafer scale integration

Abstract

IntroductionCVD synthesis of graphene on catalytically-active substrates has emerged as the most promising approach for large-area production of graphene [1] . The self-limiting nature of CVD growth on metals such as copper (Cu) and platinum allows synthesis of large-scale homogeneous films of monolayer graphene. However, electrical characterization of polycrystalline samples of CVD graphene reveals that the presence of grain boundaries causes significant degradation of the electric performance, compared to pristine material obtained by mechanical exfoliation of flakes [2] . As demonstrated initially by Petrone et al [3] , samples fabricated using single-crystals of CVD graphene can have electrical performance comparable to that of exfoliated flakes [4] . Furthermore, recent reports have shown that by fully encapsulating CVD graphene with suitable materials such as hexagonal boron nitride (h-BN), low-temperature charge carrier mobility above 300 000 cm 2 / V s [5] or even 3 000 000 cm 2 / V s [6] can be achieved.Over the last few years the synthesis of large-crystal graphene has attracted a huge scientific interest, with significant advances in the achievable crystal size [7][8][9][10] . Recent work has reported single-crystals of graphene measuring 1 cm [10] and, using copper/nickel alloy as the growth substrate, even 4 cm [11] . Inevitably, these approaches still produce randomlydistributed crystals of graphene, which limits their applicability to scaled production of graphene devices. Furthermore, the commonly-used transfer methods either allow scalability while introducing significant performance degradation, or are limited to transferring areas of several tens of µm 2 [5] .For many applications the size of individual graphene devices is limited to tens or hundreds of microns, easily achievable by the current methods of single-crystal synthesis, however, ran-dom spatial distribution of graphene crystals in such samples makes polycrystalline graphene preferable for wafer-scale integration. This issue could be mitigated by selectively predetermining the nucleation sites for graphene crystals according to the target architecture, which could allow the fabrication of large and complex circuits utilising completely monocrystalline graphene. Patterned growth using polymer-based nucleation seeds was first reported by Wu et al [12] , however, only high-density arrays of 10-20 µm crystals were demonstrated. Arrays of similar dimensions were recently presented by Song et al, using poly(methyl methacrylate) (PMMA) seeds to nucleate graphene on top of CVD-grown h-BN [13] .In this work we present a method to selectively pattern the Cu growth substrate using chromium (Cr) nucleation seeds, which allows deterministic nucleation of large-crystal graphene, measuring several hundred microns. The nucleation density is highly-controlled by the combined use of natively oxidised Cu foils, non-reducing annealing and sample enclosure [14] , and measuring as low as 10 crystals per mm 2 . We also demonstrate a clean semi-dry tran...

Nonvolatile Memories Based on Graphene and Related 2D Materials

“…2D growth has already been clearly demonstrated for graphene on copper . Deterministic nucleation and growth of graphene on copper (see Figure b) has also been demonstrated to yield graphene single crystals . This process may require edge functionalization for graphene growth on noncatalytic surfaces.…”

30°-Twisted Bilayer Graphene Quasicrystals from Chemical Vapor Deposition

“…Moreover, a few works have suggested the possibility of a highly selective growth mechanism, strongly favoring the AB and 30°-rotated stacking over random twisting [16,17]. We found that our CVD process for isolated graphene single crystals [18,19] yields large-area bilayers with AB or QC-TBG configurations exclusively. The two types can be easily distinguished on the basis of the relative orientations of the hexagonal edges of the two layers, allowing for large-scale production of QC-TBG, transfer to arbitrary substrates and device processing.…”

High-speed double layer graphene electro-absorption modulator on SOI waveguide

“…The used method allows a low level of metal contamination during the graphene delamination from the growth substrate as well as damage-free lamination onto the target substrate. A matrix of graphene crystals with 200 µm spacing and 150 µm crystal size was grown on Cu foils using chromium (Cr) nucleation seeds [22]. Cu foils were patterned with nucleation seeds using optical lithography and evaporation of 25 nm of Cr.…”