Determination of interface state density especially at the band edges by noise measurements on MOSFETs

Jäntsch, O.; Borchert, B.

doi:10.1016/0038-1101(87)90092-x

Cited by 12 publications

(2 citation statements)

References 15 publications

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“…A variety of models have been proposed to explain 1/f noise in MOSFETs [8,[11][12][13][14][15][16][17][18]. After much controversy, it is now widely accepted that the noise of MOSFETs is associated with capture and emission of charge carriers from traps in the oxide, very near to the Si/SiO 2 interface [14].…”

Section: Trapping Model For the Noisementioning

confidence: 99%

“…In this section, we expand upon a simple trapping model of the noise introduced earlier [1]. Here, we draw on the work of a variety of authors that treat generally the same model [8,[11][12][13][14][15][16][17][18]21,22]. Figure 3 shows a diagram of the energy bands of an nMOS transistor near the Si/SiO 2 interface when the device is operated in strong inversion.…”

Section: Trapping Model For the Noisementioning

confidence: 99%

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Physical basis for nondestructive tests of MOS radiation hardness

Scofield

Fleetwood

1991

IEEE Trans. Nucl. Sci.

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measurements have been extended to include temperatures in the range 80-300K. These results are used to expand upon a trapping model of the noise. The evidence suggests that the noise and the oxide-trap charge are both influenced by the preirradiation density of oxygen vacancies in the SiO 2 [2]. We have found that the 1/f noise and channel resistance of unirradiated nMOS transistors from a single lot with various gate-oxide splits closely correlate with the oxide-trap and interface trap charge, respectively, following irradiation. The 1/f noise is explained by a trapping model, while the variations in channel resistance are explained by scattering from interface-trap precursor defects. It appears that both noise and channel mobility measurements may be useful in defining nondestructive hardness assurance test methods for devices fabricated from a single technology. It may be difficult to use either for making cross-technology comparisons. Finally, during the course of this study it was found that process techniques that improve the radiation hardness of MOS devices at room temperature can greatly reduce the 1/f noise of MOS devices at cryogenic temperatures. * We also demonstrate a striking correlation between the preirradiation channel resistance of MOS transistors and their postirradiation interface-trap charge [3]. We have developed a model that relates the preirradiation 1/f-noise to the net radiation-induced oxide charge-trapping efficiency [2], and a model that relates the preirradiation channel mobility to radiation-induced interface trap generation efficiency [3]. We conclude that, even before a device is irradiated, carrier-defect interactions evidently reveal a great deal of information about the radiation hardness of MOS devices. Implications for hardness assurance testing are discussed.

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