Design of Polymer-Based Trigate Nanoscale FinFET for the Implementation of Two-Stage Operational Amplifier

Abstract

The major motivation behind transistor scaling is the requirement for high-speed transistors with lower fabrication costs. When the fin thickness or breadth is smaller than 10 nm in a trigate FET, charges travel in a nonconfined fashion, resulting in the creation of energy subbands and causing volume inversion. In comparison to the carrier near a surface inversion layer, volume inversion experiences less interface scattering. In large-scale integrations, we have focused on developing a 3D model for surface potential by establishing the three-dimensional Poison’s equation and building a unique fin field-effect transistor (FinFET) structure. In this context, there is a growing interest in developing a low-cost, simple solution that combines plastic (polymer) as a substrate and organic materials to create electronics such as monitors and sensors. The research examines characteristics such as silicon width, oxide thickness, doping concentration, metal work-function about gate, and various surface potentials. For different circuit configurations, it also examines the DC and AC characteristics of the FinFET structure. A differential amplifier is built for RF application based on the device specifications. This work is aimed at improving the semiconductor design structure by adjusting device parameters, analyzing the results, establishing the best FinFET device preferences, and selecting an application for the optimized device. The 3D Poisson’s equation may be used to create an analytical model of a trigate nanosize FinFET, which can then be tested using a TCAD simulator. By constructing such a FinFET, we can structure and analyze various electrostatic parameters. To facilitate the creation of FinFET-based circuits, including product development, a novel transistor needs a creative device basis. The infrastructure’s support denotes a computationally advantageous numerical model that accurately depicts a FinFET. The work presents a compact model for semiconductor manufacturing that permits separate IC productions while achieving higher levels of excellence and using less power. The design outperforms the CMOS by 22.7% in gain, 31.48% in power consumption, and 12.72% in CMRR, while operating at a 5 GHz unity gain frequency.

Design and Development of Efficient SRAM Cell Based on FinFET for Low Power Memory Applications

“…Memory cells were designed using complementary metal oxide semiconductor (CMOS), but at lower technology nodes. CMOS sufered from a number of drawbacks, such as subthreshold leakage current (I leakage ) and gate-induced barrier lowering (GIBL), whereas FinFET technology is capable of solving these issues [1]. Bulk CMOS devices are limited to short channel widths of the less than 45 nm, whereas FinFETs can use technology knots as small as 7 nm without sacrifcing conducting capabilities.…”

Development and Evaluation of Amlodipine-Polymer Nanocomposites Using Response Surface Methodology

“…For this purpose, various polymers have been used, as they can efficiently transfer the drug to a target location and thereby improve the therapeutic advantage while reducing adverse effects [2,3]. Therefore, the major objective in the use of polymers in drug delivery is the controlled release of therapeutics to the specific action site at the clinically optimal rate and dosage regimen [4].…”

Mechanical Test on Aluminum Alloy with Maximal Soluble SiC Reinforcement

“…Te light matrix material's dispersion phase has been improved. Te use of Al-MMCs has been increasing in recent years, as uses have been found in several automobile and spatial sectors and the overall engineering feld wherever stress fracture development is just a key evaluation parameter [2]. A stress investigation of 20 vol.% of SiC particles in material composites revealed that the size of the particles played an essential efect in the regulation of the development rate of cracks [3].…”