Design of MEMS based XOR and AND gates for rad-hard and very low power LSI mechanical processors

Chowdhury, Faisal K.; Choe, Dong-Ok; Jevremović, Tatjana; Tabib-Azar, Massood

doi:10.1109/icsens.2011.6127242

Cited by 9 publications

(6 citation statements)

References 8 publications

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“…Still, neural systems are well known to be parallel, but relatively slow systems when compared to modern digital circuits. Even if MEMS-based logic gates [3] evolve up to the point of a final product, a digital system does not degrade gracefully in normal conditions and always needs extra gates to implement error correction.…”

Section: Discussionmentioning

confidence: 99%

“…The investigation presented here was based on an earlier work 3 , where a new humanoid robot control framework using parallel, diverse and noisy groups of biologically inspired LSM was introduced [1]. This robot controller was able to reproduce trajectories (shapes) previously learned from a teacher, but the e↵ects of varying noise levels were not studied.…”

Section: Methodsmentioning

confidence: 99%

See 1 more Smart Citation

Graceful Degradation Under Noise on Brain Inspired Robot Controllers

Azambuja

Klein²,

Stoelen³

et al. 2016

Neural Information Processing

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How can we build robot controllers that are able to work under harsh conditions, but without experiencing catastrophic failures? As seen on the recent Fukushima's nuclear disaster, standard robots break down when exposed to high radiation environments. Here we present the results from two arrangements of Spiking Neural Networks, based on the Liquid State Machine (LSM) framework, that were able to gracefully degrade under the e↵ects of a noisy current injected directly into each simulated neuron. These noisy currents could be seen, in a simplified way, as the consequences of exposition to non-destructive radiation. The results show that not only can the systems withstand noise, but one of the configurations, the Modular Parallel LSM, actually improved its results, in a certain range, when the noise levels were increased. Also, the robot controllers implemented in this work are suitable to run on a modern, power e cient neuromorphic hardware such as SpiNNaker.

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Section: Discussionmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Graceful Degradation Under Noise on Brain Inspired Robot Controllers

Azambuja

Klein²,

Stoelen³

et al. 2016

Neural Information Processing

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show abstract

“…The SET effects have been investigated for XOR gates [9,10,11,12]. Radiation hardening techniques for XOR-based circuits are presented in few works, but this highlight the relevance of known the SET sensibility of the XOR gates to best design decisions [13,14,15,16]. However, there is a lack of works evaluating different XOR topologies considering radiation robust-ness operating at NTV and different ranges of temperature.…”

Section: Introductionmentioning

confidence: 99%

Soft Error Impact on FinFET and CMOS XOR Logic Gates

Oliveira

Meinhardt

2020

JICS

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With the advance of computer systems, XORgates design became essential on arithmetic circuits.Atnanometer nodes, despite the electrical characterization, de-signers must to consider soft error impact on the circuits. Thechallenges change significantly as feature size are smaller, evenfor FinFET devices. The effects of Single Event Transientare dependent of the circuit topology. Thus, in this work, weevaluate the influence of nine XOR topologies on the radia-tion robustness, discussing the influence of logic family, the de-vice technology and environment factors as temperature, onthe radiation robustness. Also, this work explore the nominaland near-threshold operation of these XOR topologies. Resultsshows that FinFET devices are significantly more robust to theradiation effects. Also, most of PTL logic XORs topologiespresent about 40% of increase on the LET threshold. The de-pendence of temperature aggressively impact the FinFET tech-nology devices operating at near-threshold. Finally, the com-plete set of information provided in this work support design-ers to choose the most appropriate XOR topology accordingthe specific design requirements.

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“…MEMS switches have virtually zero leakage current, no sub-threshold conduction [14][15] [1], possibility to integrate in the same chip with CMOS circuits, scalability and ability to perform reliably in harsh environments like high temperatures and in high ionizing radiation (I-R). It also provides advantage on power management for very large scale integrated circuits (VLSI) [1], programming interconnect in FPGAs [2], [16] and biomedical applications where reduction of leakage power is desirable for prolong battery life [17]. MEMS switches can also be used for ESD protection.…”

Section: Introductionmentioning

confidence: 99%

Back-end-of-the-line MEMS switches for power management, ESD and security

Tazin¹,

Saab²,

Tabib-Azar³

2018

Preprint

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This paper discusses a MEMS switch that can be fabricated using low temperature (<100oC) deposition and patterning techniques suitable for the back-end-of-the-line integration with CMOS. The resulting cross-bar switches can be used for electrostatic discharge protection, FPGA implementation, chip security assessment and lock-down, and circuit block power management. We discuss platinum and iron switch with turn-on voltages of ~ 1.8 V. In the case of the iron switches, we also show that they can be magnetized to have “memory” and stay on when turned on. Platinum switch cycling of up to 1000 times did not show any changes in their turn-on voltage and their contact resistance was unchanged. The 10-100 nm switch airgaps were formed using low temperature sputtered sacrificial polysilicon and XeF2 etching. XeF2 does not attack any of the metals used in CMOS enabling fabrication of cross-bar switches with any of these metals. Once activated, it takes ∿ 6  to mechanically turn on the switch that can be decreased to ~1 ns by optimizing the device structure. Interestingly, the nm-scale gaps can be used as spark gap as a fast plasma switch to discharge first followed by the activation of the MEMS switch.

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Design of MEMS based XOR and AND gates for rad-hard and very low power LSI mechanical processors

Cited by 9 publications

References 8 publications

Graceful Degradation Under Noise on Brain Inspired Robot Controllers

Graceful Degradation Under Noise on Brain Inspired Robot Controllers

Soft Error Impact on FinFET and CMOS XOR Logic Gates

Back-end-of-the-line MEMS switches for power management, ESD and security

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