Design of Low Power Sigma Delta ADC

Abstract

A Low power discrete time sigma delta ADC consisting of a second order sigma delta modulator and third order Cascaded Integrated Comb (CIC) filter is proposed. The second order modulator is designed to work at a signal band of 20K Hz at an oversampling ratio of 64 with a sampling frequency of 2.56 MHz. It achieves a signal to noise ratio of 85.2dB and a resolution of 14 bits. The CIC digital filter is designed to implement a decimation factor of 64, operating at a maximum sampling frequency of 2.56 MHz. A second order sigma delta modulator is implemented in 0.18micron CMOS technology using full custom design and the third order digital CIC decimation filter is implemented in verilog HDL. The complete Sigma Delta ADC, consisting of analog block of second order modulator and digital block of decimator consumes a total power 1.96mW.

Design and Implementation of Decimation Filter for 13-bit Sigma-Delta ADC Based on FPGA

“…Oversampling converters reduce the requirements of analog circuitry at expense of faster and more complex digital circuitry [5,6]. Sigma Delta analog-to-digital converters need relatively imprecise analog circuits and digital decimation filtering [5].The sigma-delta ADC works on the principle of sigma-delta modulation.…”

“…A sigma-delta ADC consists of an analog block of modulator and a digital block of decimator. The modulator samples the input signal at an oversampling rate, generating a one bit output stream and decimator is a digital filter or down sampler where the actual digital signal processing is done [6]. The modulator can be realized using analog technique to produce a single bit stream and a digital Decimation filter to achieve a multi bit digital output thus completing the process of analog to digital conversion [4,6].…”

Simulation Action Potential Signal Based On FPGA

“…The rapid and great development of the electronics industry has led to the ease of design and manufacture of electronic circuits, which in turn carry out electronic operations more accurate , high flexible and a few errors especially programmable electronic circuits such as Arduino, PLC, FPGA and etc [1]. This allows us to design and build any electronic circuit easily and without any complexity, which reduces the cost of manufacturing and the power consumption, in addition reducing the error rate in the circuit and also allows us to change the design at any time without the need to install new elements into this circuit [2]. Aim of this work is to generate and convert analog signal to digital signal and process it.…”

First Order Sigma-Delta Modulator With Low-Power Consumption Implemented in Ams 0.35 ¬m Cmos Technology

“…Sigma-Delta (ΣΔ) Analog to Digital Converters (ADC) [1] has been successful in realizing high resolution consumer audio products, such as MP3 players and cellular phones for some time now. DS converters are well suited for low bandwidth, high-resolution acquisition, and low cost, making them a good ADC [2] choice for many applications.…”