Operational transconductance amplifier (OTA) is one of the most significant building-blocks in integrated discret-time filters used in analog to digital converter (ADC) for Sigmadelta converter. In this paper we designed a novel design method of two-stage CMOS amplifier in AMS 0.35μm technology. P-Spice simulation results confirm the proposed OTA circuit. In fact, we achieved a gain band width (GBW) equal to 55 MHz, Cut-off frequency of 85 KHz and 57 dB gain (Av). In addition our new method allowed us to reduce settling time (S t ) to 15.6 ns and a slew rate (SR) of 0.1 V/µs at ±1.5V supply voltage. Eventually we have also succeeded in reducing the average power consumption to 1.65 mW while driving 3 pF load capacitor.
This paper presents two schemes of high performance CMOS current mirror, one of them is used for operational tran-sconductance amplifier (OTA) in analog VLSI systems. The linearity, output impedance, bandwidth and accuracy are the most parameters to determine the performance of the current mirror. Here a comparison of two architectures based on same architecture of the amplifier is presented. This comparison includes: linearity, output impedance, bandwidth and accuracy. These two circuits are validated with simulation in technology AMS 0.35 μm. An operational amplifier based on the adapted current mirror is proposed. Its frequency analysis with large bandwidth is validated with the same technology
This paper presents a design of a switched-capacitor discrete time 1st order Delta-Sigma modulator used for a resolution of 8 bits Sigma-Delta analog to digital converter. For lower power consumption, the use of operational transconductance amplifier is necessary in order to provide wide output voltage swing and moderate DC gain. Simulation results showed that with 0.35um CMOS technology, 80 KHz signal bandwidth and oversampling rate of 64, the modulator achieved 49.25 dB Signal to Noise Ratio (SNR) and the power consumption was 5.5 mW under ±1.5V supply voltage .
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