Design of Efficient Full Adder in Quantum-Dot Cellular Automata

Sen, Bibhash; Rajoria, Ayush; Sikdar, Biplab K.

doi:10.1155/2013/250802

Cited by 58 publications

(37 citation statements)

References 22 publications

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“…Bibhash Sen et al [47] Presented design and performance analysis of a new efficient coplanar quantum-dot cellular automata adder and also carried out its energy dissipation analysis.…”

Section: S Perri Et Al [42] 2012mentioning

confidence: 99%

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A Review of Quantum-Dot Cellular Automata Based Adders

Singh¹,

Sarin²,

Raj³

2017

IJHIT

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“…Bibhash Sen et al [47] Presented design and performance analysis of a new efficient coplanar quantum-dot cellular automata adder and also carried out its energy dissipation analysis.…”

Section: S Perri Et Al [42] 2012mentioning

confidence: 99%

“…This multilayer adder employs one five-input majority gate, one three-input majority gate and computes the 'Sum' output in just two clock zones [47]. The output 'Sum' is computed by equation (11).…”

Section: Qanbari and Nadooshan Addermentioning

confidence: 99%

A Review of Quantum-Dot Cellular Automata Based Adders

Singh¹,

Sarin²,

Raj³

2017

IJHIT

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“…Electrons can be arranged according to the polarization of the cell. Polarization value + 1 and -1 represents binary 1 and o respectively [1][2][3][4][5] shown in Fig. l(a).…”

Section: A Qca Cellmentioning

confidence: 99%

“…The size and speed of elec tronic devices has improved in a spectacular way. In last few years, transistor based CMOS technology has been changed swiftly because of some defects like complex logic circuits and increasing of power density level [2]. Several technologies are introduced on behalf of nanoelectronics in exchange for CMOS like quantum dot cellular automata(QCA).…”

Section: Introductionmentioning

confidence: 99%

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A compact design of n-bit ripple carry adder circuit using QCA architecture

Sultana

Bardhan

Bithee

et al. 2015

2015 IEEE/ACIS 14th International Conference on Computer and Information Science (ICIS)

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In this paper, we propose a new 3-dot based QCA architecture. We also present wiring logics, basic gates and XOR gate using proposed QCA 3-dot cell. All these components are very much efficient to compute basic operations. Moreover, we design a QCA 3-dot based half adder and extend the half adder into a full adder which has least number of QCA cells till now. We also design a powerful and efficient n-bit ripple carry adder applying our new and novel scheme. Our proposed circuits perform much better than the existing ones, e.g., the proposed 32-bit ripple carry adder circuit improves 21 % on QCA cell, 99% on area than the exist i ng best known one.

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A novel ultra‐dense and low‐power structure for fault‐tolerant three‐input majority gate in QCA technology

Ahmadpour

Mosleh

2019

Concurrency and Computation

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Quantum-dot cellular automata (QCA) is a very interesting nanoscale technology. Ultradense structure and ultralow power consumption are the most important features of QCA compared to CMOS. QCA circuits often suffer from various types of manufacturing defects and are therefore prone to fault. Hence, the design of fault-tolerant circuits in QCA technology is considered a necessity. In this paper, a novel fault-tolerant three-input majority gate is presented using 12 simple and rotated cells in QCA technology. The proposed structure is investigated against all kinds of cell omission, extra-cell deposition, and cell displacement defects. The simulation results are verified by QCADesigner 2.0.3, and it showed 100%, 89.29%, and 100% tolerance against single-cell omission, double-cell omission, and extra-cell deposition, respectively. In addition, the proposed structure is robust against cell displacement defects. Finally, using the proposed structure, a novel coplanar full adder is presented. The results were compared and indicated that the proposed designs are more reliable than the existing designs. Furthermore, QCAPro power estimator tool was employed to estimate the energy dissipation of the proposed structure. KEYWORDSfault-tolerant, nanotechnology, quantum-dot cellular automata (QCA), three-input majority gate INTRODUCTIONIn the near future, complementary metal-oxide-semiconductor (CMOS) technology is expected to reach the end of its way due to limitations such as switching speed, scaling specifications, high cost of lithography, and thermal challenges. 1-3 CMOS technology also suffers from lower tolerability and manufacturing diversity, which have a negative impact on the reliability of these devices, leading to an increase in the number of faults. Future CMOS constraints have led many researchers to design nanoscale devices. 4 Quantum-dot cellular automata (QCA) has appeared as a favorable new innovation for future integrated circuit generation, which can overcome CMOS constraints. 3 The simplest element in QCA technology is a square cell with four quantum dots located in its four corners. The transfer of information takes place by columbic interactions between the fundamental elements (cells) instead of electrical current. [3][4][5] Up to now, extensive attempts have been made on the design of various digital circuits such as multipliers, 6-8 adders, 9-19 memory devices, 20-23 arithmetic and logic unit, 24 and multiplexers [25][26][27][28][29] in QCA technology, but according to a conducted study by Bahar et al, 30 the high complexity of nanocircuit structures results in the need to design high fault-tolerant structures. The QCA technology encounters with a variety of manufacturing defects such as extra-cell deposition, cell omission, cell displacement, or cell misalignment that make QCA circuits unusable. 31,32 A three-input majority gate is considered one of the main basic gate in the QCA circuits. 33,34 Providing robust structures for the majority gate will result in the creation of fault-tolerant logic cir...

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Design of Efficient Full Adder in Quantum-Dot Cellular Automata

Cited by 58 publications

References 22 publications

A Review of Quantum-Dot Cellular Automata Based Adders

A Review of Quantum-Dot Cellular Automata Based Adders

A compact design of n-bit ripple carry adder circuit using QCA architecture

A novel ultra‐dense and low‐power structure for fault‐tolerant three‐input majority gate in QCA technology

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